tmoreau89 commented on a change in pull request #9:
URL: https://github.com/apache/incubator-tvm-vta/pull/9#discussion_r443088686



##########
File path: config/vta_cost.py
##########
@@ -0,0 +1,102 @@
+# cost function for intelfocl 32*32 gemm version
+def cal_cost(insn):
+    """
+    Cal the runtime cost statically
+
+    Parameters
+    ------------
+    insn: the insn (json)
+
+    Returns
+    ------------
+    the cost in s
+    """
+    factor = 1000000.0
+    def alu_imm_cost(iter_out, iter_in, uop_bgn, uop_end):
+        x = (uop_end - uop_bgn) * iter_out * iter_in
+        cycles = x + 46

Review comment:
       How are these costs generally derived? Are they FPGA device specific? If 
we change the compilation parameters in the OpenCL compiler, could it affect 
these cost models?




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