remotego edited a comment on pull request #9:
URL: https://github.com/apache/incubator-tvm-vta/pull/9#issuecomment-665845575
> thanks @remotego @liangfu @pasqoc for the insightful comments. I think
that all opinions expressed are very valid!
>
> So far our approach to naming VTA target has been to couple the VTA target
with the FPGA board (e.g. pynq, ultra96, de10nano). These targets also contrast
with functional simulation (sim), and cycle accurate sim (tsim).
>
> We've been using the VTA target to guide the compilation process to the
target device, given that some of the drivers had to be written in a board
specific fashion. In the case of the Intel OpenCL FPGA support, I understand
that this work captures a variety of hardware backends, including Arria 10,
Stratix10 boards etc, and that the driver codebase would remain mostly
identical between those boards (unlike Pynq, and Ultra96 that relied on very
different ARM SoCs)
>
> However to find a quick resolution to this discussion we can either choose
>
> * to use a specific board name (rather than FPGA family) to indicate that
the OCL FPGA design has been tested on this device. This echo @liangfu's
concern that we should have concrete targets for the community to reproduce
work on.
> * keep the naming open as @remotego and @pasqoc are advocating, and
classify this target as intelfocl_pcie to indicate that this applies only to
PCIE-based OpenCL Intel FPGA devices.
>
> @remotego let us know what you think
Thank you for the reply. I am okay with either approach but I would like to
suggest the decoupling between target and back-end. As we have three different
back-end right now, we will definitely run into the situation that one
particular board will be supported by more than one backend. I don't think we
need to choose a backend for the user and it will be great if the user is
willing to explore and experience the pros/cons of each backend.
Agreed with you and @liangfu, I would like to keep the current target
definition ("specific board") so that the user could have a concrete platform
to test the design. However, using board name to imply backend is confusing as
I see it. For example, as I mentioned before, the Intel OpenCL code is not
restricted to PCIe based boards, it should support SoC based boards as well,
which includes Altera DE10 boards. In addition, as Intel OpenCL platform
supports software emulation and cycle-accurate simulation as well, it could
also have targets of "fsim" and "tsim".
I propose we could place an additional backend option inside
vta_config.json, so that user could explicitly spell out the choice of backend
for VTA. We are also actively extending our support for Xilinx SDAccel/SDSoc,
so that we could support a lot more FPGA cards in the near future.
----------------------------------------------------------------
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
For queries about this service, please contact Infrastructure at:
us...@infra.apache.org
