This is an automated email from the ASF dual-hosted git repository. github-bot pushed a change to branch nightly-docker-update in repository https://gitbox.apache.org/repos/asf/tvm.git
discard 4806d9088e [ci][docker] Nightly Docker image update add 86a5ceec27 [TVMScript] Use tir::Evaluate if expression is in statement context (#13396) add 49c5d2f173 [Hexagon] Change single dma alloc buffers to be vtcm (#13374) add e030b146d9 [TECompiler] Replace static constant index with NameSupply (#13397) add edc1bfd105 Add support for cast double to fp16 (#13395) add a042a93cd9 [TIR] Add test to cover specific case of reducer match buffer checking (#13373) add 6401d0ef62 [TIR] Fix extern_primfunc buffer order bug (#13347) add 0d9b1850af [ci] fix GPU other build (#13366) add 78b53221f8 [TIR] Remove PrimFuncNode::preflattened_buffer_map (#10940) add 44ed06ac9f [ETHOSN] Relax concatenate offloading requirements (#13405) add 52739ef8cd [ci][tvmbot] Fix spelling error, metionable -> mentionable (#13276) add 271ad43029 [TOPI] Update names for pooling ops (#13401) add b4d4b82dbb [Hexagon] Fix TIR vrmpy tensorization (#13404) add a80cdc26e2 [TIR][Analysis][Arith] Implement basic data-flow analysis (#13130) add 14342a37f5 [Hexagon] Enable Hexagon User DMA bypass mode (#13381) add 35e28df7a0 [ci][docker] Nightly Docker image update This update added new revisions after undoing existing revisions. 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Summary of changes: Jenkinsfile | 20 +- ci/jenkins/Jenkinsfile.j2 | 20 +- ci/scripts/github/github_tvmbot.py | 4 +- include/tvm/runtime/builtin_fp16.h | 1 + include/tvm/script/ir_builder/tir/frame.h | 3 - include/tvm/script/ir_builder/tir/ir.h | 20 - include/tvm/tir/builtin.h | 7 - include/tvm/tir/function.h | 43 +- include/tvm/tir/op_attr_types.h | 31 + include/tvm/topi/nn/pooling.h | 18 +- .../tvm/relay/backend/contrib/ethosu/tir/passes.py | 77 +- python/tvm/relay/op/contrib/ethosn.py | 19 +- python/tvm/script/ir_builder/tir/ir.py | 69 - python/tvm/script/parser/tir/parser.py | 5 + python/tvm/script/parser_v1/context_maintainer.py | 3 - python/tvm/script/parser_v1/parser.py | 1 - python/tvm/script/parser_v1/tir/__init__.pyi | 12 - python/tvm/script/parser_v1/tir/special_stmt.py | 73 - python/tvm/te/operation.py | 11 +- python/tvm/tir/function.py | 7 - python/tvm/tir/tensor_intrin/hexagon.py | 4 - src/arith/conjunctive_normal_form.cc | 26 +- src/arith/constraint_extract.cc | 39 +- src/arith/constraint_extract.h | 31 +- src/arith/ir_visitor_with_analyzer.h | 6 +- src/arith/rewrite_simplify.cc | 53 +- src/arith/transitive_comparison_analyzer.cc | 2 +- src/arith/unwrap_vector_expr.cc | 90 ++ .../{constraint_extract.h => unwrap_vector_expr.h} | 30 +- src/driver/driver_api.cc | 1 + src/printer/tir_text_printer.cc | 10 - src/printer/tvmscript_printer.cc | 39 +- src/relay/backend/aot/aot_lower_main.cc | 2 +- src/relay/backend/aot_executor_codegen.cc | 2 +- src/relay/backend/contrib/cmsisnn/relay_to_tir.cc | 2 +- .../contrib/example_target_hooks/relay_to_tir.cc | 2 +- src/relay/backend/task_extraction.cc | 7 +- src/relay/backend/te_compiler.cc | 13 +- src/relay/backend/te_compiler_cache.cc | 32 +- src/relay/backend/te_compiler_cache.h | 15 +- .../transforms/auto_scheduler_layout_rewrite.cc | 2 +- .../transforms/meta_schedule_layout_rewrite.cc | 2 +- src/runtime/builtin_fp16.cc | 8 + src/runtime/hexagon/hexagon_buffer.cc | 18 +- src/runtime/hexagon/hexagon_device_api.cc | 29 +- src/runtime/hexagon/hexagon_user_dma.cc | 61 +- src/runtime/hexagon/hexagon_user_dma.h | 2 +- src/runtime/hexagon/hexagon_vtcm_pool.h | 12 + src/runtime/rocm/rocm_device_api.cc | 3 +- src/script/ir_builder/tir/frame.cc | 1 - src/script/ir_builder/tir/ir.cc | 22 - src/tir/analysis/control_flow_graph.cc | 1647 ++++++++++++++++++++ src/tir/analysis/control_flow_graph.h | 653 ++++++++ src/tir/analysis/device_constraint_utils.cc | 22 +- src/tir/contrib/ethosu/passes.cc | 6 +- src/tir/ir/function.cc | 10 +- src/tir/op/builtin.cc | 3 - src/tir/transforms/bf16_legalize.cc | 29 - src/tir/transforms/flatten_buffer.cc | 16 +- src/tir/transforms/legalize_packed_calls.cc | 4 +- src/tir/transforms/lower_async_dma.cc | 14 +- src/tir/transforms/lower_tvm_builtin.cc | 15 - src/tir/transforms/make_packed_api.cc | 4 +- .../plan_update_buffer_allocation_location.cc | 6 +- src/tir/transforms/simplify.cc | 105 +- src/tir/transforms/storage_flatten.cc | 201 ++- src/tir/usmp/transform/assign_pool_info.cc | 4 +- .../convert_pool_allocations_to_offsets.cc | 10 +- src/tir/usmp/transform/create_io_allocates.cc | 5 +- .../cpp-runtime/hexagon/hexagon_user_dma_tests.cc | 151 +- tests/python/ci/test_tvmbot.py | 4 +- tests/python/contrib/test_ethosn/test_networks.py | 6 +- .../contrib/test_ethosu/test_encode_constants.py | 33 +- .../contrib/test_ethosu/test_hoist_allocates.py | 31 +- .../contrib/test_ethosu/test_merge_constants.py | 44 +- .../test_ethosu/test_remove_concatenates.py | 7 +- .../contrib/test_ethosu/test_replace_conv2d.py | 48 +- .../contrib/test_ethosu/test_replace_copy.py | 8 +- tests/python/contrib/test_ethosu/test_scheduler.py | 4 +- .../test_hexagon/test_2d_physical_buffers.py | 2 +- .../test_hexagon/test_async_dma_pipeline.py | 132 +- .../contrib/test_hexagon/test_cache_read_write.py | 226 --- .../test_hexagon/test_parallel_hvx_load_vtcm.py | 9 +- .../test_hexagon/test_software_pipeline_async.py | 6 +- tests/python/contrib/test_hexagon/test_vtcm.py | 63 + .../contrib/test_hexagon/test_vtcm_bandwidth.py | 3 +- tests/python/topi/python/test_topi_math.py | 4 + .../unittest/test_aot_legalize_packed_call.py | 26 +- tests/python/unittest/test_arith_domain_touched.py | 24 +- .../python/unittest/test_arith_rewrite_simplify.py | 61 +- .../python/unittest/test_auto_scheduler_feature.py | 16 +- tests/python/unittest/test_lower_build.py | 36 +- .../python/unittest/test_tir_schedule_tensorize.py | 26 +- .../python/unittest/test_tir_te_extern_primfunc.py | 50 +- .../unittest/test_tir_transform_flatten_buffer.py | 44 +- .../unittest/test_tir_transform_loop_partition.py | 73 +- ...t_tir_transform_lower_cross_thread_reduction.py | 57 + ...test_tir_transform_renormalize_split_pattern.py | 42 +- .../python/unittest/test_tir_transform_simplify.py | 645 +++++++- .../unittest/test_tir_transform_thread_sync.py | 4 +- ...ransform_convert_pool_allocations_to_offsets.py | 72 - .../python/unittest/test_tvmscript_error_report.py | 20 - .../unittest/test_tvmscript_ir_builder_tir.py | 5 - tests/python/unittest/test_tvmscript_roundtrip.py | 10 + .../python/unittest/test_tvmscript_syntax_sugar.py | 43 +- 105 files changed, 4354 insertions(+), 1445 deletions(-) create mode 100644 src/arith/unwrap_vector_expr.cc copy src/arith/{constraint_extract.h => unwrap_vector_expr.h} (57%) create mode 100644 src/tir/analysis/control_flow_graph.cc create mode 100644 src/tir/analysis/control_flow_graph.h delete mode 100644 tests/python/contrib/test_hexagon/test_cache_read_write.py create mode 100644 tests/python/contrib/test_hexagon/test_vtcm.py