Author: apatard
Date: Wed Feb  7 17:16:03 2007
New Revision: 117243

Added:
   
packages/updates/2007.0/kernel-2.6/current/PATCHES/patches/DB50_sata_sis_update.patch
Modified:
   packages/updates/2007.0/kernel-2.6/current/SPECS/kernel-2.6.spec

Log:
Fix SiS sata chipsets support.


Added: 
packages/updates/2007.0/kernel-2.6/current/PATCHES/patches/DB50_sata_sis_update.patch
==============================================================================
--- (empty file)
+++ 
packages/updates/2007.0/kernel-2.6/current/PATCHES/patches/DB50_sata_sis_update.patch
       Wed Feb  7 17:16:03 2007
@@ -0,0 +1,287 @@
+- Fix support for 1183 chipsets on 968 bridge.
+- Merge upstream fixes
+- Done some cleanups
+
+Rtp
+---
+ drivers/scsi/sata_sis.c |  144        89 +    55 -    0 !
+ 1 files changed, 89 insertions(+), 55 deletions(-)
+
+Index: linux-2.6.17/drivers/scsi/sata_sis.c
+===================================================================
+--- linux-2.6.17.orig/drivers/scsi/sata_sis.c  2007-02-06 15:03:33.000000000 
+0100
++++ linux-2.6.17/drivers/scsi/sata_sis.c       2007-02-07 11:42:44.000000000 
+0100
+@@ -43,12 +43,13 @@
+ #include <linux/libata.h>
+ 
+ #define DRV_NAME      "sata_sis"
+-#define DRV_VERSION   "0.5-rtp"
++#define DRV_VERSION   "0.7-rtp"
+ 
+ enum {
+       sis_180                 = 0,
+       sis_182                 = 1,
+       sis_1180                = 2,
++      sis_1183                = 3,
+ 
+       SIS_SCR_PCI_BAR         = 5,
+ 
+@@ -69,9 +70,10 @@ enum {
+ static struct {
+       const char *name;
+ } sata_chip_name[] = {
+-      { "SiS180/SiS181"    },
+-      { "SiS182/1182/1183" },
+-      { "SiS1180"          },
++      { "SiS180/SiS181"   },
++      { "SiS182"   },
++      { "SiS1180"         },
++      { "SiS1182/SiS1183" }
+ };
+ 
+ struct sis_port_map
+@@ -79,12 +81,20 @@ struct sis_port_map
+       u8 port2_start;
+       u8 port2_scr_offset;
+       u8 combined_mode;
++      u8 slave;
+ };
+ 
+ static struct sis_port_map sis180_port_map = {
+       .port2_start = 0,
+       .port2_scr_offset = SIS180_SATA1_OFS,
+       .combined_mode = 1,
++      .slave = ATA_FLAG_SLAVE_POSS,
++};
++
++static struct sis_port_map sis180_sata_port_map = {
++      .port2_start = 64,
++      .port2_scr_offset = SIS180_SATA1_OFS,
++      .combined_mode = 0,
+ };
+ 
+ static struct sis_port_map sis182_port_map = {
+@@ -95,7 +105,13 @@ static struct sis_port_map sis182_port_m
+ 
+ static struct sis_port_map sis1180_port_map = {
+       .port2_start = 0,
+-      .port2_scr_offset = SIS180_SATA1_OFS,
++      .port2_scr_offset = SIS182_SATA1_OFS,
++      .combined_mode = 0,
++};
++
++static struct sis_port_map sis1183_968_port_map = {
++      .port2_start = 0x10,
++      .port2_scr_offset = SIS182_SATA1_OFS,
+       .combined_mode = 0,
+ };
+ 
+@@ -103,6 +119,7 @@ static struct sis_port_map *port_map_tab
+       [sis_180]  = &sis180_port_map,
+       [sis_182]  = &sis182_port_map,
+       [sis_1180] = &sis1180_port_map,
++      [sis_1183] = &sis182_port_map
+ };
+ 
+ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id 
*ent);
+@@ -115,8 +132,8 @@ static const struct pci_device_id sis_pc
+       { PCI_VENDOR_ID_SI, 0x181, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_180 },
+       { PCI_VENDOR_ID_SI, 0x182, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_182 },
+       { PCI_VENDOR_ID_SI, 0x1180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_1180 },
+-      { PCI_VENDOR_ID_SI, 0x1182, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_182 },
+-      { PCI_VENDOR_ID_SI, 0x1183, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_182 },
++      { PCI_VENDOR_ID_SI, 0x1182, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_1183 },
++      { PCI_VENDOR_ID_SI, 0x1183, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sis_1183 },
+       { }     /* terminate list */
+ };
+ 
+@@ -172,7 +189,7 @@ static const struct ata_port_operations 
+ static struct ata_port_info sis_port_info = {
+       .sht            = &sis_sht,
+       .host_flags     = ATA_FLAG_SATA | ATA_FLAG_SATA_RESET |
+-                        ATA_FLAG_NO_LEGACY | ATA_FLAG_SLAVE_POSS,
++                        ATA_FLAG_NO_LEGACY,
+       .pio_mask       = 0x1f,
+       .mwdma_mask     = 0x7,
+       .udma_mask      = 0x7f,
+@@ -211,7 +228,7 @@ static u32 sis_scr_cfg_read (struct ata_
+       if (port_map->combined_mode)
+               pci_read_config_dword(pdev, cfg_addr+0x10, &val2);
+ 
+-      return (val|val2) & 3;
++      return (val|val2) & 0xfffffffb; /* avoid problems with powerdowned 
ports */
+ }
+ 
+ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
+@@ -245,11 +262,7 @@ static u32 sis_scr_read (struct ata_port
+       if (port_map->combined_mode)
+               val2 = inl(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
+ 
+-      /* Due to the port status is ORed with two SATA ports.
+-       * Some boards powered down unused SATA ports.
+-       * We need to mask 0x3 to report the correct value
+-       **/
+-      return (val | val2) & 3;
++      return (val | val2) & 0xfffffffb;
+ }
+ 
+ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
+@@ -268,55 +281,70 @@ static void sis_scr_write (struct ata_po
+       }
+ }
+ 
+-static void sis_init_port_map(struct pci_dev *pdev, const struct 
pci_device_id *ent, struct ata_probe_ent *probe_ent)
++static void sis_init_port_map(struct pci_dev *pdev, const struct 
pci_device_id *ent, struct sis_port_map *port_map)
+ {
+       u8 pmr;
+       u32 val;
+-      struct sis_port_map *port_map = probe_ent->private_data;
++      char *bridge;
+ 
+       memcpy(port_map,port_map_table[ent->driver_data],sizeof(*port_map));
++      bridge = "";
+ 
+       /* Detect if SiS180/181 is in combined mode or not */
+       if (ent->driver_data == sis_180) {
+               pci_read_config_byte(pdev, SIS_PMR, &pmr);
+               if ((pmr & SIS_PMR_COMBINED) == 0) {
+-                      port_map->port2_start = 64;
+-                      port_map->combined_mode = 0;
++                      memcpy(port_map, &sis180_sata_port_map, 
sizeof(*port_map));
+               }
+-              dev_printk(KERN_INFO, &pdev->dev,
+-                         "Detected %s chipset in %s mode\n",
+-                         sata_chip_name[ent->driver_data].name,
+-                         port_map->combined_mode ? "combined" : "SATA");
+       }
+-      else
+-              dev_printk(KERN_INFO, &pdev->dev, "Detected %s chipset\n",
+-                              sata_chip_name[ent->driver_data].name);
+ 
+-      /* SiS 1180 behave differently if we're on 966 or on 966L
+-       *  read OFF_SET 64h, bit 28 to decide  966 or 966L.
++      if (ent->driver_data == sis_182) {
++              bridge="SiS965L";
++              pci_read_config_dword ( pdev, 0x6C, &val);
++              if (val & (1L << 31)) {
++                      bridge="SiS965";
++                      port_map->slave = ATA_FLAG_SLAVE_POSS;
++              }
++      }
++
++      /* SiS 1180/1182 behave differently if we're on 966 or on 966L
++       *  read OFFSET 64h, bit 28 to decide  966 or 966L.
+        *  1: 966L port0 = c0h, port1 = e0h
+        *  0: 966  port0 = c0h, port1 = d0h
+-       * */
+-      if (ent->driver_data == sis_1180) {
++       **/
++      if (ent->driver_data >= sis_1180) {
++              bridge="SiS966L";
+               pci_read_config_dword(pdev, 0x64, &val);
+-              if (val & 0x10000000) {
+-                      port_map->port2_scr_offset = SIS182_SATA1_OFS;
+-                      dev_printk(KERN_INFO, &pdev->dev,
+-                                 "SiS 966L chipset detected\n");
+-              }
+-              else {
+-                      dev_printk(KERN_INFO, &pdev->dev,
+-                                 "SiS 966 chipset detected\n");
++              if (!(val & 0x10000000)) {
++                      bridge="SiS966";
++                      if (ent->driver_data == sis_1180)
++                              port_map->port2_scr_offset = SIS180_SATA1_OFS;
++                      port_map->slave = ATA_FLAG_SLAVE_POSS;
+               }
+       }
+ 
+-      if (!(probe_ent->host_flags & SIS_FLAG_CFGSCR)) {
+-              probe_ent->port[0].scr_addr =
+-                      pci_resource_start(pdev, SIS_SCR_PCI_BAR);
+-              probe_ent->port[1].scr_addr =
+-                      pci_resource_start(pdev, SIS_SCR_PCI_BAR) + 
port_map->port2_start;
++      /* SiS 1183 behaves differently on 966 and 968 chips.
++       * In 968, it only gets two SATA ports, one per channel.
++       * But in 966 chips, 1183 gets 4 SATA ports, and 2 for 966L
++       * 1183 SCRs offset are differernt between 966 and 968 chips
++       **/
++      /* Note from RTP: I assume that 1182 on SiS968 behaves like 1183
++       * even if getting a board with such configuration is unlikely
++       **/
++      if (ent->driver_data == sis_1183) {
++              if (!pci_get_device(PCI_VENDOR_ID_SI, 0x0966, NULL))  {
++                      bridge="SiS968";
++                      memcpy(port_map, &sis1183_968_port_map, 
sizeof(*port_map));
++              }
+       }
+ 
++      dev_printk(KERN_INFO, &pdev->dev, "Detected %s chipset in %s mode\n",
++                         sata_chip_name[ent->driver_data].name,
++                         port_map->combined_mode ? "combined" : "SATA");
++
++      if (strcmp(bridge,""))
++              dev_printk(KERN_INFO, &pdev->dev, "Detected a %s 
bridge\n",bridge);
++
+ }
+ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id 
*ent)
+ {
+@@ -325,7 +353,7 @@ static int sis_init_one (struct pci_dev 
+       struct ata_probe_ent *probe_ent = NULL;
+       int rc;
+       u32 genctl;
+-      struct ata_port_info *ppi;
++      struct ata_port_info *ppi = &sis_port_info;
+       int pci_dev_busy = 0;
+       u8 pci_class_prog;
+       u16 pci_class;
+@@ -372,32 +400,38 @@ static int sis_init_one (struct pci_dev 
+       if (rc)
+               goto err_out_regions;
+ 
+-      ppi = &sis_port_info;
+-      probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | 
ATA_PORT_SECONDARY);
+-      if (!probe_ent) {
+-              rc = -ENOMEM;
+-              goto err_out_regions;
+-      }
+-
+-
+       /* check and see if the SCRs are in IO space or PCI cfg space */
+       pci_read_config_dword(pdev, SIS_GENCTL, &genctl);
+       if ((genctl & GENCTL_IOMAPPED_SCR) == 0)
+-              probe_ent->host_flags |= SIS_FLAG_CFGSCR;
++              ppi->host_flags |= SIS_FLAG_CFGSCR;
+ 
+       /* if hardware thinks SCRs are in IO space, but there are
+        * no IO resources assigned, change to PCI cfg space.
+        */
+-      if ((!(probe_ent->host_flags & SIS_FLAG_CFGSCR)) &&
++      if ((!(ppi->host_flags & SIS_FLAG_CFGSCR)) &&
+           ((pci_resource_start(pdev, SIS_SCR_PCI_BAR) == 0) ||
+            (pci_resource_len(pdev, SIS_SCR_PCI_BAR) < 128))) {
+               genctl &= ~GENCTL_IOMAPPED_SCR;
+               pci_write_config_dword(pdev, SIS_GENCTL, genctl);
+-              probe_ent->host_flags |= SIS_FLAG_CFGSCR;
++              ppi->host_flags |= SIS_FLAG_CFGSCR;
++      }
++
++      sis_init_port_map(pdev, ent, port_map);
++      ppi->host_flags |= port_map->slave;
++
++      probe_ent = ata_pci_init_native_mode(pdev, &ppi, ATA_PORT_PRIMARY | 
ATA_PORT_SECONDARY);
++      if (!probe_ent) {
++              rc = -ENOMEM;
++              goto err_out_regions;
+       }
+ 
+       probe_ent->private_data = port_map;
+-      sis_init_port_map(pdev, ent, probe_ent);
++      if (!(probe_ent->host_flags & SIS_FLAG_CFGSCR)) {
++              probe_ent->port[0].scr_addr =
++                      pci_resource_start(pdev, SIS_SCR_PCI_BAR);
++              probe_ent->port[1].scr_addr =
++                      pci_resource_start(pdev, SIS_SCR_PCI_BAR) + 
port_map->port2_start;
++      }
+ 
+       pci_set_master(pdev);
+       pci_intx(pdev, 1);

Modified: packages/updates/2007.0/kernel-2.6/current/SPECS/kernel-2.6.spec
==============================================================================
--- packages/updates/2007.0/kernel-2.6/current/SPECS/kernel-2.6.spec    
(original)
+++ packages/updates/2007.0/kernel-2.6/current/SPECS/kernel-2.6.spec    Wed Feb 
 7 17:16:03 2007
@@ -7,9 +7,9 @@
 # XXX to be obsoleted
 %define distsuffix mdv
 %define sublevel 17
-%define mdkrelease 10
+%define mdkrelease 11
 %define use_patch 0
-#define patchlevel uc2
+%define patchlevel uc1
 %define devel_notice %{?patchlevel:NOTE: This is work-in-progress (WIP) 
development kernel.}
 
 # This is only to make life easier for people that creates derivated kernels
@@ -1025,6 +1025,10 @@
 %endif
 
 %changelog
+* Wed Feb 07 2007 Arnaud Patard <[EMAIL PROTECTED]> 2.6.17-11.uc1mdv2007.0
+  o Arnaud Patard <[EMAIL PROTECTED]>
+    - Fix SiS sata support for chips on 966/968 bridges.
+
 * Fri Feb 02 2007 Luiz Capitulino <[EMAIL PROTECTED]> 2.6.17-10mdv2007.0
   o Gwenole Beauchesne <[EMAIL PROTECTED]>
     - Add Ralink RT2571W/RT2671 WLAN USB support (rt73 module)

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