Hello,
This patch adds a special test+enable conf mode function for the
IT8661 (and IT8770F which seems to be identical (same ID),
thus the added "/IT8770F") which is called in the beginning of
enter_conf_mode_ite (and if it succeeds, skip other enables).
0x3F0 is added to the ITE scanned ports because the 8661/8770 can be
programmed to 0x3F0,0x370 or 0x3BD only
(gets programmed by the test function).
Signed-off-by: Urja Rannikko <[EMAIL PROTECTED]>
Also included is an proprietary bios dump from the board (with this
patch) (that has an IT8770F).
--
urjaman
Index: ite.c
===================================================================
--- ite.c (revision 3667)
+++ ite.c (working copy)
@@ -27,8 +27,7 @@
#define CHIP_VERSION_REG 0x22
static const struct superio_registers reg_table[] = {
- {0x8661, "IT8661F", {
- /* TODO: Needs different init sequence. */
+ {0x8661, "IT8661F/IT8770F", {
{NOLDN, NULL,
{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22,
0x23,0x24,EOT},
@@ -436,6 +435,49 @@
{EOT}
};
+
+
+static int test_enable_it8661(uint16_t port) {
+ const uint8_t isapnp_initkey[] = {
+ 0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE,
+ 0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61,
+ 0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1,
+ 0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x39
+ };
+ uint8_t addrsetsequence[4] = { 0x86, 0x61, 0x55, 0x55 };
+ const uint16_t isapnp_addr = 0x279;
+ uint8_t reg1, reg2, regrev;
+ int i;
+ switch (port) {
+ case 0x3F0:
+ addrsetsequence[2] = 0x55;
+ addrsetsequence[3] = 0x55;
+ break;
+ case 0x370:
+ addrsetsequence[2] = 0xAA;
+ addrsetsequence[3] = 0x55;
+ break;
+ case 0x3BD:
+ addrsetsequence[2] = 0x55;
+ addrsetsequence[3] = 0xAA;
+ break;
+ default:
+ return 0;
+ };
+
+ outb(0x55,isapnp_addr);
+ outb(0x55,isapnp_addr); /* Reset key check logic */
+ for(i=0;i<4;i++) outb(addrsetsequence[i],isapnp_addr);
+ for(i=0;i<32;i++) outb(isapnp_initkey[i],port);
+ reg1 = regval(port,CHIP_ID_BYTE1_REG);
+ reg2 = regval(port,CHIP_ID_BYTE2_REG);
+ regrev = regval(port,CHIP_VERSION_REG);
+ if (verbose) printf("Attempted IT8661 detect; ID = 0x%02X%02X, IDREV = 0x%02X\n",reg1,reg2,regrev);
+ if ((reg1 == 0x86)&&(reg2 == 0x61)) return 1;
+ regwrite(port, 0x02, 0x02);
+ return 0;
+ }
+
/**
* IT871[01]F and IT8708F use 0x87, 0x87
* IT8761F uses 0x87, 0x61, 0x55, 0x55/0xaa
@@ -445,6 +487,8 @@
*/
static void enter_conf_mode_ite(uint16_t port)
{
+
+ if (test_enable_it8661(port)) return;
outb(0x87, port);
outb(0x01, port);
outb(0x55, port);
Index: superiotool.h
===================================================================
--- superiotool.h (revision 3667)
+++ superiotool.h (working copy)
@@ -118,7 +118,7 @@
} superio_ports_table[] = {
{probe_idregs_ali, {0x3f0, 0x370, EOT}},
{probe_idregs_fintek, {0x2e, 0x4e, EOT}},
- {probe_idregs_ite, {0x2e, 0x4e, EOT}},
+ {probe_idregs_ite, {0x2e, 0x4e, 0x3f0, EOT}},
{probe_idregs_nsc, {0x2e, 0x4e, 0x15c, EOT}},
{probe_idregs_smsc, {0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370, EOT}},
{probe_idregs_winbond, {0x2e, 0x4e, 0x3f0, 0x370, 0x250, EOT}},
superiotool r3658
Found ITE IT8661F/IT8770F (id=0x8661, rev=0x6) at 0x3f0
Register dump:
idx 00 01 02 03 04 05 06 20 21 22 23 24
val 00 00 00 00 ff 01 00 86 61 06 00 00
def NA NA NA NA NA NA 00 86 61 00 00 00
LDN 0x00 (Floppy)
idx 30 31 60 61 70 71 74 f0
val 01 00 03 f0 06 02 02 00
def 00 00 03 f0 06 02 02 00
LDN 0x01 (COM1)
idx 30 31 60 61 70 71 f0
val 01 00 03 f8 04 02 00
def 00 00 03 f8 04 02 00
LDN 0x02 (COM2)
idx 30 31 60 61 70 71 f0
val 00 00 02 f8 03 02 00
def 00 00 02 f8 03 02 00
LDN 0x03 (Parallel port)
idx 30 31 60 61 62 63 70 71 74 f0
val 01 00 03 78 00 00 07 02 04 00
def 00 00 03 78 07 78 07 02 03 03
LDN 0x04 (IR)
idx 30 31 60 61 62 63 70 71 72 73 74 75 f0
val 00 00 00 00 00 00 00 02 00 00 04 04 00
def 00 00 02 e8 03 00 0a 02 0b 02 01 00 00
LDN 0x05 (GPIO)
idx 25 26 60 61 62 63 64 65 66 67 70 f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc
val 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
def 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
--
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