On Tue, Nov 4, 2008 at 1:37 PM, Shadravan Fontanov <[EMAIL PROTECTED]> wrote: > citation from datasheet of ICH5/ICH5R chipset > (http://download.intel.com/design/chipsets/datashts/25251601.pdf), > page 385: > "These registers are enabled in the PCI Device 31: Function 0 space > (PM_IO_EN), and can be > moved to any I/O location (128-byte aligned)." > > I didnt understand, who moves the registers in the i/o space -- BIOS, > or linux kernel? Is there a default value for PMBASE (0x800), at which > the registers are visible after starting the machine, without the need > of explicit i/o mapping?
See the definition of PMBASE on page 322. --Ed -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot