On 15.11.2008, at 11:47, Chris Lingard <[EMAIL PROTECTED]> wrote:
coreboot-v2 has been giving the following error:
PCI: 00:01.0 init
set power on after power fail
RTC Init
Invalid CMOS LB checksum
PNP: 002e.1 init
I have put some debugging in rtc_checksum_valid of mc146818rtc.c to
output the variables, and got
PU model AMD Athlon(tm) 64 X2 Dual Core Processor 6000+
Setting up local apic... apic_id: 0x01 done.
CPU #1 Initialized
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 00:01.0 init
set power on after power fail
RTC Init
Sum f31c
Old Sum f31c
Sum cfe1
Old Sum 2225
Invalid CMOS LB checksum
PNP: 002e.1 init
This persists on reboot, and on cold start. I have no idea why the
second call to this procedure results in this, but think it is a
timing problem.
The first sum is the 'normal of bios checksum' while the second is an
extended checksum.
You can correct it by changing a setting with nvramtool
Stefan
This procedure is called twice from rtc_init, and I think that the
second call is wrong; so I changed the second one:
/* See if there is a LB CMOS checksum error */
/* checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
LB_CKS_RANGE_END,LB_CKS_LOC); */
if(checksum_invalid)
printk_debug("Invalid CMOS LB checksum\n");
{
/* Make certain we have a valid checksum */
rtc_set_checksum(PC_CKS_RANGE_START,
PC_CKS_RANGE_END,PC_CKS_LOC);
}
checksum_invalid is already set, so the second call to
rtc_checksum_valid is commented out
The check sum was being written back every time, right or wrong, so
I have put rtc_set_checksum within the failure bit.
Chris Lingard
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