Author: rminnich
Date: 2008-11-25 21:45:32 +0100 (Tue, 25 Nov 2008)
New Revision: 1053

Modified:
   coreboot-v3/mainboard/kontron/986lcd-m/stage1.c
Log:
testing 

Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Acked-by: Ronald G. Minnich <[EMAIL PROTECTED]>


Modified: coreboot-v3/mainboard/kontron/986lcd-m/stage1.c
===================================================================
--- coreboot-v3/mainboard/kontron/986lcd-m/stage1.c     2008-11-25 20:18:27 UTC 
(rev 1052)
+++ coreboot-v3/mainboard/kontron/986lcd-m/stage1.c     2008-11-25 20:45:32 UTC 
(rev 1053)
@@ -208,12 +208,14 @@
        void    early_superio_config_w83627thg(void);
        void    ich7_enable_lpc(void);
        int boot_mode = 0;
+#if 0
        /* hack */
        pci_conf1_write_config32(PCI_BDF(0, 0x1f, 0), RCBA, DEFAULT_RCBA | 1);
        /* Change port80 to LPC */
        RCBA32(GCS) &= (~0x04);
        /* end hack */
-
+#endif
+       post_code(0xcc);
        enable_lapic();
 
        ich7_enable_lpc();


--
coreboot mailing list: [email protected]
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to