On Mon, Jun 22, 2009 at 5:06 AM, Arnaud Maye<arnaud.m...@4dsp.com> wrote: > I've narrowed down the problem to the mtrr.c file in src/cpu/x86/mtrr/ in > the function set_fixed_mtrrs(). > > The first time disable_cache() is called, the CPU gets "lost". It either > hang or jump back to some code > to hang a bit after. > > Am not 100% sure but I would say that as soon we disable the cache, the > processor is "forced" to > execute from RAM and not from the cache itself, having this strange behavior > here can still mean the > memory controller settings are not correct, right?
That does seems like symptom of memory controller misconfiguration. I'd recommend you proceed by disabling ECC (comment out the "Set the ECC mode" line in raminit_ep80579.c) and enabling the ram_fill() and ram_verify() steps in auto.c. Adjust the parameters to fill and verify the entire memory range. This is a very simple test that should pass reliably before you try anything fancy like booting a payload. --Ed -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
