See patch
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: i...@coresystems.de • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
intel core and core 2:
- small preprocessor fix
- leave some space in the CAR area for the usbdebug structure
if usbdebug is used
Signed-off-by: Stefan Reinauer <ste...@coresystems.de>
Index: src/cpu/intel/model_6ex/cache_as_ram.inc
===================================================================
--- src/cpu/intel/model_6ex/cache_as_ram.inc (revision 4842)
+++ src/cpu/intel/model_6ex/cache_as_ram.inc (working copy)
@@ -94,7 +94,6 @@
//movl $0x23322332, %eax
xorl %eax, %eax
rep stosl
-#endif
/* Enable Cache As RAM mode by disabling cache */
movl %cr0, %eax
@@ -117,10 +116,16 @@
/* enable cache */
movl %cr0, %eax
andl $( ~( (1 << 30) | (1 << 29) ) ), %eax
- movl %eax, %cr0
+ movl %eax, %cr0
+#endif
/* Set up stack pointer */
+#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1)
+ /* leave some space for the struct ehci_debug_info */
+ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax
+#else
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
+#endif
movl %eax, %esp
/* Restore the BIST result */
Index: src/cpu/intel/model_6fx/cache_as_ram.inc
===================================================================
--- src/cpu/intel/model_6fx/cache_as_ram.inc (revision 4842)
+++ src/cpu/intel/model_6fx/cache_as_ram.inc (working copy)
@@ -101,7 +101,6 @@
//movl $0x23322332, %eax
xorl %eax, %eax
rep stosl
-#endif
/* Enable Cache As RAM mode by disabling cache */
movl %cr0, %eax
@@ -124,10 +123,16 @@
/* enable cache */
movl %cr0, %eax
andl $( ~( (1 << 30) | (1 << 29) ) ), %eax
- movl %eax, %cr0
+ movl %eax, %cr0
+#endif
/* Set up stack pointer */
+#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1)
+ /* leave some space for the struct ehci_debug_info */
+ movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax
+#else
movl $(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
+#endif
movl %eax, %esp
/* Restore the BIST result */
--
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