Author: stepan
Date: 2010-01-19 22:15:37 +0100 (Tue, 19 Jan 2010)
New Revision: 5043

Modified:
   trunk/src/mainboard/kontron/986lcd-m/mptable.c
Log:
Kontron 986LCD-M MP table:
When any of the onboard network cards are disabled, the bus numbers change 
and thus PCI devices in the riser wouldn't get their interrupts right if a
kernel without ACPI support is booted. This patch dynamically creates the 
correct bus numbers for the firewire and riser card entries

Signed-off-by: Stefan Reinauer <ste...@coresystems.de>
Acked-by: Peter Stuge <pe...@stuge.se>



Modified: trunk/src/mainboard/kontron/986lcd-m/mptable.c
===================================================================
--- trunk/src/mainboard/kontron/986lcd-m/mptable.c      2010-01-19 21:15:01 UTC 
(rev 5042)
+++ trunk/src/mainboard/kontron/986lcd-m/mptable.c      2010-01-19 21:15:37 UTC 
(rev 5043)
@@ -33,8 +33,9 @@
         static const char oem[8] = "COREBOOT";
         static const char productid[12] = "986LCD-M    ";
         struct mp_config_table *mc;
+       struct device *riser = NULL, *firewire = NULL;
        int i;
-       int max_pci_bus, isa_bus;
+       int max_pci_bus, firewire_bus = 0, riser_bus = 0, isa_bus;
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
@@ -54,9 +55,27 @@
         mc->reserved = 0;
 
         smp_write_processors(mc);
+       max_pci_bus=0;
 
-       max_pci_bus = 5; // XXX read me from bridges.
+       firewire = dev_find_device(0x104c, 0x8023, 0);
+       if (firewire) {
+               firewire_bus = firewire->bus->secondary;
+               printk_spew("Firewire device is on bus %x\n",
+                               firewire_bus);
+               max_pci_bus = firewire_bus;
+       }
 
+       // If a riser card is used, this riser is detected on bus 4, so its 
secondary bus is the
+       // highest bus number on the pci bus.
+       riser = dev_find_device(0x3388, 0x0021, 0);
+       if (!riser)
+               riser = dev_find_device(0x3388, 0x0022, 0);
+       if (riser) {
+               riser_bus = riser->link[0].secondary;
+               printk_spew("Riser bus is %x\n", riser_bus);
+               max_pci_bus = riser_bus;
+       }
+
        /* ISA bus follows */
        isa_bus = max_pci_bus + 1;
 
@@ -98,20 +117,24 @@
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x0, 0x71, 0x2, 0x11);
 
        /* Firewire 4:0.0 */
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x4, 0x0, 0x2, 0x10);
+       if (firewire) {
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, firewire_bus, 0x0, 0x2, 0x10);
+       }
 
-       /* Old riser card */
-       // riser slot top 5:8.0
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x5, 0x20, 0x2, 0x14);
-       // riser slot middle 5:9.0
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x5, 0x24, 0x2, 0x15);
-       // riser slot bottom 5:a.0
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x5, 0x28, 0x2, 0x16);
+       if (riser) {
+               /* Old riser card */
+               // riser slot top 5:8.0
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x20, 0x2, 0x14);
+               // riser slot middle 5:9.0
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x24, 0x2, 0x15);
+               // riser slot bottom 5:a.0
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x28, 0x2, 0x16);
 
-       /* New Riser Card */
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x5, 0x30, 0x2, 0x14);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x5, 0x34, 0x2, 0x15);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x5, 0x38, 0x2, 0x16);
+               /* New Riser Card */
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x30, 0x2, 0x14);
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x34, 0x2, 0x15);
+               smp_write_intsrc(mc, mp_INT, 
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, riser_bus, 0x38, 0x2, 0x16);
+       }
 
        /* Onboard Ethernet */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 
0x1, 0x0, 0x2, 0x10);


-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to