This patch selects SSE & SSE2 in the socket if one exists (except for AMD since there are many sockets for two models).
The reasoning is that sockets can support multiple models of CPUS for intel, and SSE & SSE2 settings need to be based on the least capable CPU. It's all correct as far as Google tells me. Socket PGA370 - SSE but not SSE2 (supports PIII) Slot 1 - SSE but not SSE2 Slot 2 - SSE but not SSE2 Via C3 - SSE but not SSE2 Via C7 - SSE and SSE2 Qemu - not SSE2 (I don't know about SSE, so I didn't set it) Geode - not SSE or SSE2 intel ep80579 SSE and SSE2 Socket 441 SSE and SSE2 Socket mPGA479M SSE and SSE2 Socket mPGA604 SSE and SSE2 Socket BGA956 MMX and SSE and SSE2 Socket mFCPGA478 MMX and SSE and SSE2 Socket mPGA478 MMX and SSE and SSE2 Socket mPGA603 MMX and SSE and SSE2 some intel model_f?x Kconfig files weren't being sourced in src/cpu/intel/Kconfig Signed-off-by: Myles Watson <[email protected]> Thanks, Myles
Index: svn/src/cpu/amd/model_gx1/Kconfig =================================================================== --- svn.orig/src/cpu/amd/model_gx1/Kconfig +++ svn/src/cpu/amd/model_gx1/Kconfig @@ -31,3 +31,12 @@ config DCACHE_RAM_SIZE default 0x01000 depends on CPU_AMD_GX1 +config SSE + bool + default n + depends on CPU_AMD_GX1 + +config SSE2 + bool + default n + depends on CPU_AMD_GX1 Index: svn/src/cpu/amd/model_gx2/Kconfig =================================================================== --- svn.orig/src/cpu/amd/model_gx2/Kconfig +++ svn/src/cpu/amd/model_gx2/Kconfig @@ -30,3 +30,12 @@ config DCACHE_RAM_SIZE default 0x01000 depends on CPU_AMD_GX2 +config SSE + bool + default n + depends on CPU_AMD_GX2 + +config SSE2 + bool + default n + depends on CPU_AMD_GX2 Index: svn/src/cpu/amd/model_lx/Kconfig =================================================================== --- svn.orig/src/cpu/amd/model_lx/Kconfig +++ svn/src/cpu/amd/model_lx/Kconfig @@ -11,3 +11,12 @@ config DCACHE_RAM_SIZE default 0x8000 depends on CPU_AMD_LX +config SSE + bool + default n + depends on CPU_AMD_LX + +config SSE2 + bool + default n + depends on CPU_AMD_LX Index: svn/src/cpu/amd/sc520/Kconfig =================================================================== --- svn.orig/src/cpu/amd/sc520/Kconfig +++ svn/src/cpu/amd/sc520/Kconfig @@ -10,3 +10,13 @@ config HAVE_INIT_TIMER bool default n depends on CPU_AMD_SC520 + +config SSE + bool + default n + depends on CPU_AMD_SC520 + +config SSE2 + bool + default n + depends on CPU_AMD_SC520 Index: svn/src/cpu/emulation/qemu-x86/Kconfig =================================================================== --- svn.orig/src/cpu/emulation/qemu-x86/Kconfig +++ svn/src/cpu/emulation/qemu-x86/Kconfig @@ -1,3 +1,7 @@ config CPU_EMULATION_QEMU_X86 bool +config SSE2 + bool + default n + depends on CPU_EMULATION_QEMU_X86 Index: svn/src/cpu/intel/slot_1/Kconfig =================================================================== --- svn.orig/src/cpu/intel/slot_1/Kconfig +++ svn/src/cpu/intel/slot_1/Kconfig @@ -20,6 +20,7 @@ config CPU_INTEL_SLOT_1 bool + select SSE config DCACHE_RAM_BASE hex @@ -31,3 +32,7 @@ config DCACHE_RAM_SIZE default 0x01000 depends on CPU_INTEL_SLOT_1 +config SSE2 + bool + default n + depends on CPU_INTEL_SLOT_1 Index: svn/src/cpu/intel/slot_2/Kconfig =================================================================== --- svn.orig/src/cpu/intel/slot_2/Kconfig +++ svn/src/cpu/intel/slot_2/Kconfig @@ -20,6 +20,7 @@ config CPU_INTEL_SLOT_2 bool + select SSE config DCACHE_RAM_BASE hex @@ -31,3 +32,7 @@ config DCACHE_RAM_SIZE default 0x01000 depends on CPU_INTEL_SLOT_2 +config SSE2 + bool + default n + depends on CPU_INTEL_SLOT_2 Index: svn/src/cpu/intel/Kconfig =================================================================== --- svn.orig/src/cpu/intel/Kconfig +++ svn/src/cpu/intel/Kconfig @@ -2,6 +2,11 @@ source src/cpu/intel/model_69x/Kconfig source src/cpu/intel/model_6dx/Kconfig source src/cpu/intel/model_6ex/Kconfig source src/cpu/intel/model_6fx/Kconfig +source src/cpu/intel/model_f0x/Kconfig +source src/cpu/intel/model_f1x/Kconfig +source src/cpu/intel/model_f2x/Kconfig +source src/cpu/intel/model_f3x/Kconfig +source src/cpu/intel/model_f4x/Kconfig source src/cpu/intel/model_1067x/Kconfig source src/cpu/intel/model_106cx/Kconfig Index: svn/src/cpu/intel/socket_PGA370/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_PGA370/Kconfig +++ svn/src/cpu/intel/socket_PGA370/Kconfig @@ -21,4 +21,10 @@ config CPU_INTEL_SOCKET_PGA370 bool select MMX + select SSE select UDELAY_TSC + +config SSE2 + bool + default n + depends on CPU_INTEL_SOCKET_PGA370 Index: svn/src/cpu/via/model_c3/Kconfig =================================================================== --- svn.orig/src/cpu/via/model_c3/Kconfig +++ svn/src/cpu/via/model_c3/Kconfig @@ -2,3 +2,9 @@ config CPU_VIA_C3 bool select UDELAY_TSC select MMX + select SSE + +config SSE2 + bool + default n + depends on CPU_VIA_C3 Index: svn/src/cpu/intel/ep80579/Kconfig =================================================================== --- svn.orig/src/cpu/intel/ep80579/Kconfig +++ svn/src/cpu/intel/ep80579/Kconfig @@ -1,2 +1,5 @@ config CPU_INTEL_EP80579 bool + select MMX + select SSE + select SSE2 Index: svn/src/cpu/intel/model_1067x/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_1067x/Kconfig +++ svn/src/cpu/intel/model_1067x/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_CORE2 bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_106cx/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_106cx/Kconfig +++ svn/src/cpu/intel/model_106cx/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_ATOM_230 bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_6ex/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_6ex/Kconfig +++ svn/src/cpu/intel/model_6ex/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_CORE bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_6fx/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_6fx/Kconfig +++ svn/src/cpu/intel/model_6fx/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_CORE2 bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_f0x/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_f0x/Kconfig +++ svn/src/cpu/intel/model_f0x/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_MODEL_F0X bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_f1x/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_f1x/Kconfig +++ svn/src/cpu/intel/model_f1x/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_MODEL_F1X bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_f2x/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_f2x/Kconfig +++ svn/src/cpu/intel/model_f2x/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_MODEL_F2X bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_f3x/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_f3x/Kconfig +++ svn/src/cpu/intel/model_f3x/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_MODEL_F3X bool select SMP - select SSE2 Index: svn/src/cpu/intel/model_f4x/Kconfig =================================================================== --- svn.orig/src/cpu/intel/model_f4x/Kconfig +++ svn/src/cpu/intel/model_f4x/Kconfig @@ -1,4 +1,3 @@ config CPU_INTEL_MODEL_F4X bool select SMP - select SSE2 Index: svn/src/cpu/intel/socket_441/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_441/Kconfig +++ svn/src/cpu/intel/socket_441/Kconfig @@ -3,3 +3,4 @@ config CPU_INTEL_SOCKET_441 select CPU_INTEL_MODEL_106CX select MMX select SSE + select SSE2 Index: svn/src/cpu/intel/socket_mPGA479M/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_mPGA479M/Kconfig +++ svn/src/cpu/intel/socket_mPGA479M/Kconfig @@ -4,3 +4,4 @@ config CPU_INTEL_SOCKET_MPGA479M select CPU_INTEL_MODEL_6DX select MMX select SSE + select SSE2 Index: svn/src/cpu/intel/socket_mPGA604/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_mPGA604/Kconfig +++ svn/src/cpu/intel/socket_mPGA604/Kconfig @@ -5,4 +5,5 @@ config CPU_INTEL_SOCKET_MPGA604 select CPU_INTEL_MODEL_F4X select MMX select SSE + select SSE2 select UDELAY_TSC Index: svn/src/cpu/via/model_c7/Kconfig =================================================================== --- svn.orig/src/cpu/via/model_c7/Kconfig +++ svn/src/cpu/via/model_c7/Kconfig @@ -2,4 +2,5 @@ config CPU_VIA_C7 bool select UDELAY_TSC select MMX + select SSE select SSE2 Index: svn/src/cpu/intel/bga956/Kconfig =================================================================== --- svn.orig/src/cpu/intel/bga956/Kconfig +++ svn/src/cpu/intel/bga956/Kconfig @@ -1,3 +1,6 @@ config CPU_INTEL_SOCKET_BGA956 bool select CPU_INTEL_CORE2 + select MMX + select SSE + select SSE2 Index: svn/src/cpu/intel/socket_mFCPGA478/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_mFCPGA478/Kconfig +++ svn/src/cpu/intel/socket_mFCPGA478/Kconfig @@ -1,2 +1,5 @@ config CPU_INTEL_SOCKET_MFCPGA478 bool + select MMX + select SSE + select SSE2 Index: svn/src/cpu/intel/socket_mPGA478/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_mPGA478/Kconfig +++ svn/src/cpu/intel/socket_mPGA478/Kconfig @@ -2,3 +2,6 @@ config CPU_INTEL_SOCKET_MPGA478 bool select CPU_INTEL_MODEL_69X select CPU_INTEL_MODEL_6DX + select MMX + select SSE + select SSE2 Index: svn/src/cpu/intel/socket_mPGA603/Kconfig =================================================================== --- svn.orig/src/cpu/intel/socket_mPGA603/Kconfig +++ svn/src/cpu/intel/socket_mPGA603/Kconfig @@ -3,3 +3,6 @@ config CPU_INTEL_SOCKET_MPGA603 select CPU_INTEL_MODEL_F0X select CPU_INTEL_MODEL_F1X select CPU_INTEL_MODEL_F2X + select MMX + select SSE + select SSE2
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