Author: stepan
Date: Tue Mar 30 23:48:23 2010
New Revision: 5334
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5334
Log:
fix some southbridge warnings (trivial)
Signed-off-by: Stefan Reinauer <ste...@coresystems.de>
Acked-by: Stefan Reinauer <ste...@coresystems.de>
Modified:
trunk/src/southbridge/intel/i82801ax/Kconfig
trunk/src/southbridge/intel/i82801ax/i82801ax_reset.c
trunk/src/southbridge/intel/i82801ax/i82801ax_watchdog.c
trunk/src/southbridge/intel/i82870/p64h2_pcibridge.c
Modified: trunk/src/southbridge/intel/i82801ax/Kconfig
==============================================================================
--- trunk/src/southbridge/intel/i82801ax/Kconfig Tue Mar 30 23:47:10
2010 (r5333)
+++ trunk/src/southbridge/intel/i82801ax/Kconfig Tue Mar 30 23:48:23
2010 (r5334)
@@ -20,4 +20,6 @@
config SOUTHBRIDGE_INTEL_I82801AX
bool
+ select HAVE_HARD_RESET
+ select USE_WATCHDOG_ON_BOOT
Modified: trunk/src/southbridge/intel/i82801ax/i82801ax_reset.c
==============================================================================
--- trunk/src/southbridge/intel/i82801ax/i82801ax_reset.c Tue Mar 30
23:47:10 2010 (r5333)
+++ trunk/src/southbridge/intel/i82801ax/i82801ax_reset.c Tue Mar 30
23:48:23 2010 (r5334)
@@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <reset.h>
#include <arch/io.h>
void hard_reset(void)
Modified: trunk/src/southbridge/intel/i82801ax/i82801ax_watchdog.c
==============================================================================
--- trunk/src/southbridge/intel/i82801ax/i82801ax_watchdog.c Tue Mar 30
23:47:10 2010 (r5333)
+++ trunk/src/southbridge/intel/i82801ax/i82801ax_watchdog.c Tue Mar 30
23:48:23 2010 (r5334)
@@ -22,6 +22,7 @@
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
+#include <watchdog.h>
/* TODO: I'm fairly sure the same functionality is provided elsewhere. */
Modified: trunk/src/southbridge/intel/i82870/p64h2_pcibridge.c
==============================================================================
--- trunk/src/southbridge/intel/i82870/p64h2_pcibridge.c Tue Mar 30
23:47:10 2010 (r5333)
+++ trunk/src/southbridge/intel/i82870/p64h2_pcibridge.c Tue Mar 30
23:48:23 2010 (r5334)
@@ -8,13 +8,12 @@
static void p64h2_pcix_init(device_t dev)
{
- uint32_t dword;
- uint16_t word;
- uint8_t byte;
+ u32 dword;
+ u8 byte;
-
- /* The purpose of changes to HCCR, ACNF, and MTT is to speed up the
- PCI bus for cards having high speed transfers. */
+ /* The purpose of changes to HCCR, ACNF, and MTT is to speed
+ * up the PCI bus for cards having high speed transfers.
+ */
dword = 0xc2040002;
pci_write_config32(dev, HCCR, dword);
dword = 0x0000c3bf;
@@ -37,4 +36,4 @@
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82870_1F0,
};
-
+
--
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