See patch
--
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: i...@coresystems.de • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
Drop some unused stuff from the various ld scripts.
Signed-off-by: Stefan Reinauer <ste...@coresystems.de>
Index: src/arch/i386/init/ldscript_apc.lb
===================================================================
--- src/arch/i386/init/ldscript_apc.lb (revision 5410)
+++ src/arch/i386/init/ldscript_apc.lb (working copy)
@@ -1,4 +1,3 @@
-/* INPUT(coreboot_ap.rom)*/
INCLUDE "ldoptions"
SECTIONS
{
@@ -9,8 +8,4 @@
*(.rodata.*)
_eapcrom = .;
}
- _iseg_apc = CONFIG_DCACHE_RAM_BASE;
- _eiseg_apc = _iseg_apc + SIZEOF(.apcrom);
- _liseg_apc = _apcrom;
- _eliseg_apc = _eapcrom;
}
Index: src/arch/i386/init/ldscript_failover.lb
===================================================================
--- src/arch/i386/init/ldscript_failover.lb (revision 5410)
+++ src/arch/i386/init/ldscript_failover.lb (working copy)
@@ -1,29 +1,8 @@
-/*
- * Memory map:
- *
- * CONFIG_RAMBASE
- * : data segment
- * : bss segment
- * : heap
- * : stack
- * CONFIG_ROMBASE
- * : coreboot text
- * : readonly text
+/* Copyright (C) 2006 Yinghai Lu
+ * Copyright (C) 2008-2010 coresystems GmbH
*/
-/*
- * Bootstrap code for the STPC Consumer
- * Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
- *
- */
-/*
- * Written by Johan Rydberg, based on work by Daniel Kahlin.
- * Rewritten by Eric Biederman
- */
-/*
- * We use ELF as output format. So that we can
- * debug the code in some form.
- */
+/* We use ELF as output format. So that we can debug the code in some form. */
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
@@ -34,8 +13,6 @@
TARGET(binary)
SECTIONS
{
- . = 0;
-
/* This section might be better named .setup */
.rom ROMLOC : {
_rom = .;
@@ -44,7 +21,7 @@
*(.rom.data.*);
*(.rodata.*);
_erom = .;
- } >rom =0xff
+ } >rom = 0xff
ROMLOC = 0xffffff00 - (_erom - _rom) + 1;
Index: src/arch/i386/init/ldscript_fallback_cbfs.lb
===================================================================
--- src/arch/i386/init/ldscript_fallback_cbfs.lb (revision 5410)
+++ src/arch/i386/init/ldscript_fallback_cbfs.lb (working copy)
@@ -27,10 +27,6 @@
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
-/*
-ENTRY(_start)
-*/
-
TARGET(binary)
SECTIONS
{
@@ -45,8 +41,6 @@
_rom = .;
*(.rom.text);
*(.rom.data);
- *(.init.rodata.*);
- *(.init.text);
*(.rodata);
*(.rodata.*);
*(.rom.data.*);
Index: src/arch/i386/coreboot_ram.ld
===================================================================
--- src/arch/i386/coreboot_ram.ld (revision 5410)
+++ src/arch/i386/coreboot_ram.ld (working copy)
@@ -39,6 +39,7 @@
. = ALIGN(16);
_etext = .;
}
+
.rodata : {
_rodata = .;
. = ALIGN(4);
@@ -57,7 +58,6 @@
/*
* kevinh/Ispiri - Added an align, because the objcopy tool
* incorrectly converts sections that are not long word aligned.
- * This breaks the coreboot.rom target.
*/
. = ALIGN(4);
@@ -76,16 +76,6 @@
_edata = .;
}
- .sdata : {
- _SDA_BASE_ = .;
- *(.sdata)
- }
-
- .sdata2 : {
- _SDA2_BASE_ = .;
- *(.sdata2)
- }
-
/*
* bss does not contain data, it is just a space that should be zero
* initialized on startup. (typically uninitialized global variables)
--
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