On Mon, Apr 12, 2010 at 3:28 AM, Arne Georg Gleditsch <arne.gledit...@numascale.com> wrote: > My only remaining real issue is that parts of the nvidia mcp55 init code > will not run properly using mmconf. The offending line is > > RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000, > > which causes the operations > > pci_read_config32: 00010000:0078: 20040000 > pci_write_config32: 00010000:0078: 19040000 > > the second of which never returns when executed using mmconf. I'm > speculating that this might be related to missing HT responses or > something due to bus reconfiguration. As far as I can tell the device > being targeted here is 10de:0364 (ISA bridge: nVidia Corporation MCP55 > LPC Bridge). > > Anoyone familiar with the mcp55 who can shed some light on what this > write is supposed to accomplish and perhaps also on why it succeeds > using the IO config mechanism when mmconf fails?
That write has always caused a hang on Arista boards, even using plain IO accesses. I have no idea what it's supposed to do, but we've left it commented out with no apparent ill effects. (Which reminds me that I need to port our patches to a modern version of Coreboot one of these days...) --Ed -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot