-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hi,

I used the Sillicon Image PCI card with onboard BIOS. It works well in SeaBIOS.
I would say here would be enough to extract the optionrom from orig BIOS. And
SeaBIOS will assign/use it.

By the bizarre coincidence I had this board @home and booting from IDE worked
well (under SeaBIOS).

Attached patch enables bios_extract to extract the BIOS ;)

oprom_4.rom is for SATA
oprom_3.rom is FastTRAK

I think you can http://www.coreboot.org/SeaBIOS go same as for Adding the VGA
rom here.

As a side note one could program an GPL rombios for this controller - any 
takers?

Thanks,
Rudolf
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAkvh0FgACgkQ3J9wPJqZRNWS9ACfX/zKWvtO+WV/wwHkDxPdq6P9
qZgAoIrO8y4BaYJBV2e/Lx//gsbpy6I/
=vBZM
-----END PGP SIGNATURE-----
diff --git a/bios_extract.c b/bios_extract.c
index cd87ee8..bbd2d17 100644
--- a/bios_extract.c
+++ b/bios_extract.c
@@ -90,6 +90,7 @@ static struct {
     {"AMIEBBLK", "AMIBIOSC", AMI95Extract},
     {"Award BootBlock", "= Award Decompression Bios =", AwardExtract},
     {"Phoenix FirstBIOS", "BCPSEGMENT", PhoenixExtract},
+    {"Phoenix ServerBIOS 3", "BCPSEGMENT", PhoenixExtract},
     {"PhoenixBIOS 4.0", "BCPSEGMENT", PhoenixExtract},
     {"Phoenix TrustedCore", "BCPSEGMENT", PhoenixTrustedExtract},
     {NULL, NULL, NULL},

Attachment: add_ServerBIOS3.patch.sig
Description: Binary data

-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

Reply via email to