Author: stepan Date: Wed Jun 9 21:07:19 2010 New Revision: 5624 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5624
Log: The interrupt controller lives at I/O 0x4d0/0x4d1. However on these platforms we were causing a resource conflict by letting the resource allocator start allocations at 0x400. Change the constraints to start at 0x1000 so we avoid allocating over LPT ports (0x778-0x77f), PCI (0xcf8-0xcff) and some other fixed resources that might live down there (smbus base, acpi base,...) Signed-off-by: Stefan Reinauer <[email protected]> Acked-by: Myles Watson <[email protected]> Modified: trunk/src/southbridge/amd/cs5530/cs5530_isa.c trunk/src/southbridge/via/vt8231/vt8231_lpc.c trunk/src/southbridge/via/vt8235/vt8235_lpc.c Modified: trunk/src/southbridge/amd/cs5530/cs5530_isa.c ============================================================================== --- trunk/src/southbridge/amd/cs5530/cs5530_isa.c Wed Jun 9 10:08:12 2010 (r5623) +++ trunk/src/southbridge/amd/cs5530/cs5530_isa.c Wed Jun 9 21:07:19 2010 (r5624) @@ -33,7 +33,7 @@ res = new_resource(dev, 1); res->base = 0x0UL; - res->size = 0x400UL; + res->size = 0x1000UL; res->limit = 0xffffUL; res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; Modified: trunk/src/southbridge/via/vt8231/vt8231_lpc.c ============================================================================== --- trunk/src/southbridge/via/vt8231/vt8231_lpc.c Wed Jun 9 10:08:12 2010 (r5623) +++ trunk/src/southbridge/via/vt8231/vt8231_lpc.c Wed Jun 9 21:07:19 2010 (r5624) @@ -136,7 +136,7 @@ res = new_resource(dev, 1); res->base = 0x0UL; - res->size = 0x400UL; + res->size = 0x1000UL; res->limit = 0xffffUL; res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; Modified: trunk/src/southbridge/via/vt8235/vt8235_lpc.c ============================================================================== --- trunk/src/southbridge/via/vt8235/vt8235_lpc.c Wed Jun 9 10:08:12 2010 (r5623) +++ trunk/src/southbridge/via/vt8235/vt8235_lpc.c Wed Jun 9 21:07:19 2010 (r5624) @@ -110,7 +110,7 @@ // Set gen config 0 pci_write_config8(dev, 0x80, 0x20); - // Set ACPI base address to IO 0x4000 + // Set ACPI base address to IO 0x400 pci_write_config16(dev, 0x88, 0x0401); // set ACPI irq to 5 @@ -223,7 +223,7 @@ res = new_resource(dev, 1); res->base = 0x0UL; - res->size = 0x400UL; + res->size = 0x1000UL; res->limit = 0xffffUL; res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
