Hello.
This is a patch for setting the processor names updated to the
same doc as the original but revision June 2010.
It applies to svn 5703 and I tested it with my previous patch.warnerrors
and patch.serial1 and it makes no difference. I can't tell whether
it works yet, but maybe someone else can try it if their boards boot.
Signed off by: Xavi Drudis Ferran <xdru...@tinet.cat>
Index: src/cpu/amd/model_10xxx/processor_name.c
===================================================================
--- src/cpu/amd/model_10xxx/processor_name.c (revision 5692)
+++ src/cpu/amd/model_10xxx/processor_name.c (working copy)
@@ -23,6 +23,8 @@
*
* Revision Guide for AMD Family 10h Processors
* Publication # 41322 Revision: 3.17 Issue Date: February 2008
+ * modified by Xavi Drudis Ferran (xdru...@tinet.cat) 2010-08-01
+ * from #41322 Revision: 3.74 Issue Date: June 2010
*/
#include <console/console.h>
@@ -45,17 +47,21 @@
char const *value;
};
+ // nodocs == were in the old sources, but are not in current docs
static const struct str_s String1_socket_F[] = {
- {0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 83"},
- {0x00, 0x01, 0x01, "Dual-Core AMD Opteron(tm) Processor 23"},
+ {0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 83"}, /*nodocs*/
+ {0x00, 0x01, 0x01, "Dual-Core AMD Opteron(tm) Processor 23"}, /*nodocs*/
{0x00, 0x03, 0x00, "Quad-Core AMD Opteron(tm) Processor 83"},
{0x00, 0x03, 0x01, "Quad-Core AMD Opteron(tm) Processor 23"},
- {0x00, 0x03, 0x02, "Embedded AMD Opteron(tm) Processor 83"},
- {0x00, 0x03, 0x03, "Embedded AMD Opteron(tm) Processor 23"},
- {0x00, 0x03, 0x04, "Embedded AMD Opteron(tm) Processor 13"},
- {0x00, 0x03, 0x05, "AMD Phenom(tm) FX-"},
- {0x01, 0x01, 0x01, "Embedded AMD Opteron(tm) Processor"},
+ {0x00, 0x03, 0x02, "Embedded AMD Opteron(tm) Processor 83"}, /*nodocs*/
+ {0x00, 0x03, 0x03, "Embedded AMD Opteron(tm) Processor 23"}, /*nodocs*/
+ {0x00, 0x03, 0x04, "Embedded AMD Opteron(tm) Processor 13"}, /*nodocs*/
+ {0x00, 0x03, 0x05, "AMD Phenom(tm) FX-"}, /*nodocs*/
+ {0x00, 0x05, 0x00, "Six-Core AMD Opteron(tm) Processor 84"},
+ {0x00, 0x05, 0x01, "Six-Core AMD Opteron(tm) Processor 24"},
+ {0x01, 0x01, 0x01, "Embedded AMD Opteron(tm) Processor"}, /*nodocs*/
+ {0x01, 0x03, 0x01, "Embedded AMD Opteron(tm) Processor "},
{0, 0, 0, NULL}
};
@@ -63,22 +69,64 @@
{0x00, 0xFF, 0x0A, " SE"},
{0x00, 0xFF, 0x0B, " HE"},
{0x00, 0xFF, 0x0C, " EE"},
- {0x00, 0xFF, 0x0D, " Quad-Core Processor"},
+ {0x00, 0xFF, 0x0D, " Quad-Core Processor"}, /*nodocs*/
{0x00, 0xFF, 0x0F, ""},
- {0x01, 0x01, 0x01, "GF HE"},
+ {0x00, 0x05, 0x00, " SE"},
+ {0x00, 0x05, 0x01, " HE"},
+ {0x00, 0x05, 0x02, " EE"},
+
+ {0x01, 0x03, 0x01, "GF HE"},
+ {0x01, 0x03, 0x02, "HF HE"},
+ {0x01, 0x03, 0x03, "VS"},
+ {0x01, 0x03, 0x04, "QS HE"},
+ {0x01, 0x03, 0x05, "NP HE"},
+ {0x01, 0x03, 0x06, "KH HE"},
+ {0x01, 0x03, 0x07, "KS EE"},
+
{0, 0, 0, NULL}
};
static const struct str_s String1_socket_AM2[] = {
- {0x00, 0x00, 0x00, "AMD Athlon(tm) Processor LE-"},
- {0x00, 0x00, 0x01, "AMD Sempron(tm) Processor LE-"},
- {0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 13"},
- {0x00, 0x01, 0x01, "AMD Athlon(tm)"},
+ {0x00, 0x00, 0x02, "AMD Sempron(tm) 1"},
+ {0x00, 0x00, 0x03, "AMD Athlon(tm) II 1"},
+ {0x00, 0x00, 0x01, "AMD Athlon(tm) "},
+
+ // duplicated in documentation
+ {0x00, 0x00, 0x03, "AMD Athlon(tm) II X2 2"},
+
+ {0x00, 0x00, 0x04, "AMD Athlon(tm) II X2 B"},
+ {0x00, 0x00, 0x05, "AMD Athlon(tm) II X2 "},
+ {0x00, 0x00, 0x07, "AMD Phenom(tm) II X2 5"},
+ {0x00, 0x00, 0x0A, "AMD Phenom(tm) II X2 "},
+ {0x00, 0x00, 0x0B, "AMD Phenom(tm) II X2 B"},
+ {0x00, 0x00, 0x0C, "AMD Sempron(tm) X2 1"},
{0x00, 0x02, 0x00, "AMD Phenom(tm)"},
+ {0x00, 0x02, 0x03, "AMD Phenom(tm) II X3 B"},
+ {0x00, 0x02, 0x04, "AMD Phenom(tm) II X3 "},
+ {0x00, 0x02, 0x07, "AMD Athlon(tm) II X3 4"},
+ {0x00, 0x02, 0x08, "AMD Phenom(tm) II X3 7"},
+ {0x00, 0x02, 0x0A, "AMD Athlon(tm) II X3 "},
{0x00, 0x03, 0x00, "Quad-Core AMD Opteron(tm) Processor 13"},
+ {0x00, 0x03, 0x02, "AMD Phenom(tm) "},
+ {0x00, 0x03, 0x03, "AMD Phenom(tm) II X4 9"},
+ {0x00, 0x03, 0x04, "AMD Phenom(tm) II X4 8"},
+ {0x00, 0x03, 0x07, "AMD Phenom(tm) II X4 B"},
+ {0x00, 0x03, 0x08, "AMD Phenom(tm) II X4 "},
+ {0x00, 0x03, 0x0A, "AMD Athlon(tm) II X4 6"},
+ {0x00, 0x03, 0x0F, "AMD Athlon(tm) II X4 "},
+ {0x00, 0x05, 0x00, "AMD Phenom(tm) II X6 1"},
+ {0x01, 0x03, 0x02, "AMD Phenom(tm) II X4 9"},
+ {0x01, 0x03, 0x03, "AMD Phenom(tm) II X4 8"},
+
+ {0x00, 0x00, 0x00, "AMD Athlon(tm) Processor LE-"}, /*nodocs*/
+ {0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 13"}, /*nodocs*/
+ {0x00, 0x01, 0x01, "AMD Athlon(tm)"}, /*nodocs*/
+
{0x00, 0x03, 0x01, "AMD Phenom(tm) FX-"},
- {0x00, 0x03, 0x02, "AMD Phenom(tm)"},
+ // in old sources, contrary to current docs
+ // {0x00, 0x00, 0x01, "AMD Sempron(tm) Processor LE-"},
+
{0, 0, 0, NULL}
};
@@ -93,33 +141,140 @@
{0x00, 0x00, 0x07, "70"},
{0x00, 0x00, 0x08, "80"},
{0x00, 0x00, 0x09, "90"},
- {0x00, 0x01, 0x00, "00 Dual-Core Processor"},
- {0x00, 0x01, 0x01, "00e Dual-Core Processor"},
- {0x00, 0x01, 0x02, "00B Dual-Core Processor"},
+ {0x00, 0x00, 0x0A, " Processor"},
+ {0x00, 0x00, 0x0B, "u Processor"},
+
+ {0x00, 0x01, 0x00, "00 Dual-Core Processor"}, /*nodocs*/
+ {0x00, 0x01, 0x01, "00e Dual-Core Processor"}, /*nodocs*/
+ {0x00, 0x01, 0x02, "00B Dual-Core Processor"}, /*nodocs*/
{0x00, 0x01, 0x03, "50 Dual-Core Processor"},
- {0x00, 0x01, 0x04, "50e Dual-Core Processor"},
- {0x00, 0x01, 0x05, "50B Dual-Core Processor"},
+ {0x00, 0x01, 0x04, "50e Dual-Core Processor"}, /*nodocs*/
+ {0x00, 0x01, 0x05, "50B Dual-Core Processor"}, /*nodocs*/
+ {0x00, 0x01, 0x06, " Processor"},
+ {0x00, 0x01, 0x07, "e Processor"},
+ {0x00, 0x01, 0x09, "0 Processor"},
+ {0x00, 0x01, 0x0A, "0e Processor"},
+ {0x00, 0x01, 0x0B, "u Processor"},
+
{0x00, 0x02, 0x00, "00 Triple-Core Processor"},
{0x00, 0x02, 0x01, "00e Triple-Core Processor"},
{0x00, 0x02, 0x02, "00B Triple-Core Processor"},
{0x00, 0x02, 0x03, "50 Triple-Core Processor"},
{0x00, 0x02, 0x04, "50e Triple-Core Processor"},
{0x00, 0x02, 0x05, "50B Triple-Core Processor"},
+ {0x00, 0x02, 0x06, " Processor"},
+ {0x00, 0x02, 0x07, "e Processor"},
+ {0x00, 0x02, 0x09, "0e Processor"},
+ {0x00, 0x02, 0x0A, "0 Processor"},
+
{0x00, 0x03, 0x00, "00 Quad-Core Processor"},
{0x00, 0x03, 0x01, "00e Quad-Core Processor"},
{0x00, 0x03, 0x02, "00B Quad-Core Processor"},
{0x00, 0x03, 0x03, "50 Quad-Core Processor"},
{0x00, 0x03, 0x04, "50e Quad-Core Processor"},
{0x00, 0x03, 0x05, "50B Quad-Core Processor"},
- {0x00, 0x03, 0x0A, " SE"},
- {0x00, 0x03, 0x0B, " HE"},
- {0x00, 0x03, 0x0C, " EE"},
- {0x00, 0x03, 0x0D, " Quad-Core Processor"},
+ {0x00, 0x03, 0x06, " Processor"},
+ {0x00, 0x03, 0x07, "e Processor"},
+ {0x00, 0x03, 0x09, "0e Processor"},
+ {0x00, 0x03, 0x0A, " SE"}, /*nodocs*/
+ {0x00, 0x03, 0x0B, " HE"}, /*nodocs*/
+ {0x00, 0x03, 0x0C, " EE"}, /*nodocs*/
+ {0x00, 0x03, 0x0D, " Quad-Core Processor"}, /*nodocs*/
+ {0x00, 0x03, 0x0E, "0 Processor"},
+
+ {0x00, 0x05, 0x00, "5T Processor"},
+ {0x00, 0x05, 0x01, "0T Processor"},
+
{0x00, 0xFF, 0x0F, ""},
+
+ {0x01, 0x03, 0x04, "T Processor"},
+
{0, 0, 0, NULL}
};
+static const struct str_s String1_S1g[] = {
+ {0x00, 0x00, 0x00, "AMD Sempron(tm) M1"},
+ {0x00, 0x00, 0x01, "AMD V"},
+ {0x00, 0x01, 0x00, "AMD Turion(tm) II Ultra Dual-Core Mobile M6"},
+ {0x00, 0x01, 0x01, "AMD Turion(tm) II Dual-Core Mobile M5"},
+ {0x00, 0x01, 0x02, "AMD Athlon(tm) II Dual-Core M3"},
+ {0x00, 0x01, 0x03, "AMD Turion(tm) II P"},
+ {0x00, 0x01, 0x04, "AMD Athlon(tm) II P"},
+ {0x00, 0x01, 0x05, "AMD Phenom(tm) II X"},
+ {0x00, 0x01, 0x06, "AMD Phenom(tm) II N"},
+ {0x00, 0x01, 0x07, "AMD Turion(tm) II N"},
+ {0x00, 0x01, 0x08, "AMD Athlon(tm) II N"},
+ {0x00, 0x02, 0x02, "AMD Phenom(tm) II P"},
+ {0x00, 0x02, 0x03, "AMD Phenom(tm) II N"},
+ {0x00, 0x03, 0x01, "AMD Phenom(tm) II P"},
+ {0x00, 0x03, 0x02, "AMD Phenom(tm) II X"},
+ {0x00, 0x03, 0x03, "AMD Phenom(tm) II N"},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String2_S1g[] = {
+ {0x00, 0x00, 0x01, "0 Processor"},
+ {0x00, 0x01, 0x02, "0 Dual-Core Processor"},
+ {0x00, 0x02, 0x02, "0 Triple-Core Processor"},
+ {0x00, 0x03, 0x01, "0 Quad-Core Processor"},
+ {0x00, 0xFF, 0x0F, ""},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String1_G34r1[] = {
+ {0x00, 0x07, 0x00, "AMD Opteron(tm) Processor 61"},
+ {0x00, 0x0B, 0x00, "AMD Opteron(tm) Processor 61"},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String2_G34r1[] = {
+ {0x00, 0x07, 0x00, " HE"},
+ {0x00, 0x07, 0x01, " SE"},
+ {0x00, 0x0B, 0x00, " HE"},
+ {0x00, 0x0B, 0x01, " SE"},
+ {0x00, 0xFF, 0x0F, ""},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String1_ASB2[] = {
+ {0x00, 0x00, 0x01, "AMD Athlon(tm) II Neo K"},
+ {0x00, 0x00, 0x02, "AMD V"},
+ {0x00, 0x00, 0x03, "AMD Athlon(tm) II Neo R"},
+ {0x00, 0x01, 0x01, "AMD Turion(tm) II Neo K"},
+ {0x00, 0x01, 0x02, "AMD Athlon(tm) II Neo K"},
+ {0x00, 0x01, 0x03, "AMD V"},
+ {0x00, 0x01, 0x04, "AMD Turion(tm) II Neo N"},
+ {0x00, 0x01, 0x05, "AMD Athlon(tm) II Neo N"},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String2_ASB2[] = {
+ {0x00, 0x00, 0x01, "5 Processor"},
+ {0x00, 0x00, 0x02, "L Processor"},
+ {0x00, 0x01, 0x01, "5 Dual-Core Processor"},
+ {0x00, 0x01, 0x02, "L Dual-Core Processor"},
+ {0x00, 0xFF, 0x0F, ""},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String1_C32r1[] = {
+ {0x00, 0x03, 0x00, "AMD Opteron(tm) Processor 41"},
+ {0x00, 0x05, 0x00, "AMD Opteron(tm) Processor 41"},
+ {0, 0, 0, NULL}
+};
+
+static const struct str_s String2_C32r1[] = {
+ {0x00, 0x03, 0x00, " HE"},
+ {0x00, 0x03, 0x01, " EE"},
+ {0x00, 0x05, 0x00, " HE"},
+ {0x00, 0x05, 0x01, " EE"},
+ {0x00, 0xFF, 0x0F, ""},
+ {0, 0, 0, NULL}
+};
+
+
+
const char const *unknown = "AMD Processor model unknown";
const char const *unknown2 = " type unknown";
const char const *sample = "AMD Engineering Sample";
@@ -183,6 +338,27 @@
str = String1_socket_AM2;
str2 = String2_socket_AM2;
break;
+ case 2:
+ Model--;
+ str = String1_S1g;
+ str2 = String2_S1g;
+ break;
+ case 3:
+ Model--;
+ str = String1_G34r1;
+ str2 = String2_G34r1;
+ break;
+ case 4:
+ Model--;
+ str = String1_ASB2;
+ str2 = String2_ASB2;
+ break;
+ case 5:
+ Model--;
+ str = String1_C32r1;
+ str2 = String2_C32r1;
+ break;
+
default:
goto done;
}
@@ -215,7 +391,7 @@
/* String 2 */
for(i = 0; str2[i].value; i++) {
if ((str2[i].Pg == Pg) &&
- ((str2[i].NC == NC) || !str2_checkNC) &&
+ ((str2[i].NC == NC) || (str2[i].NC == 0xFF) ||
!str2_checkNC) &&
(str2[i].String == String2)) {
processor_name_string = str2[i].value;
break;
--
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