Hi, The SPI should be on 0x8, not 0x7, as that is the VID. I double checked the datasheet and came across this while working on the coreboot port for my board. This is a follow-up for the initial F71889 support for superiotool.
fix-SPI-VID.patch
Description: Binary data
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
