Author: stepan
Date: Sat Dec 11 21:33:41 2010
New Revision: 6161
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6161

Log:
After this has been brought up many times before, rename src/arch/i386 to
src/arch/x86. 

Signed-off-by: Stefan Reinauer <ste...@coreboot.org>
Acked-by: Patrick Georgi <patr...@georgi-clan.de>

Added:
   trunk/src/arch/x86/
      - copied from r6158, trunk/src/arch/i386/
Deleted:
   trunk/src/arch/i386/
Modified:
   trunk/Makefile
   trunk/src/Kconfig
   trunk/src/arch/x86/Makefile.bigbootblock.inc
   trunk/src/arch/x86/Makefile.bootblock.inc
   trunk/src/arch/x86/Makefile.inc
   trunk/src/arch/x86/boot/Makefile.inc
   trunk/src/arch/x86/init/Makefile.inc
   trunk/src/arch/x86/lib/Makefile.inc
   trunk/src/cpu/via/model_c7/model_c7_init.c
   trunk/src/include/lib.h
   trunk/src/mainboard/amd/dbm690t/dsdt.asl
   trunk/src/mainboard/amd/mahogany/dsdt.asl
   trunk/src/mainboard/amd/mahogany_fam10/dsdt.asl
   trunk/src/mainboard/amd/pistachio/dsdt.asl
   trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
   trunk/src/mainboard/amd/tilapia_fam10/dsdt.asl
   trunk/src/mainboard/asrock/939a785gmh/dsdt.asl
   trunk/src/mainboard/asus/m4a78-em/dsdt.asl
   trunk/src/mainboard/asus/m4a785-m/dsdt.asl
   trunk/src/mainboard/dell/s1850/romstage.c
   trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
   trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c
   trunk/src/mainboard/gigabyte/ma785gmt/dsdt.asl
   trunk/src/mainboard/gigabyte/ma78gm/dsdt.asl
   trunk/src/mainboard/iei/kino-780am2-fam10/dsdt.asl
   trunk/src/mainboard/intel/jarrell/romstage.c
   trunk/src/mainboard/intel/mtarvon/romstage.c
   trunk/src/mainboard/intel/truxton/romstage.c
   trunk/src/mainboard/intel/xe7501devkit/irq_tables.c
   trunk/src/mainboard/jetway/pa78vm5/dsdt.asl
   trunk/src/mainboard/kontron/kt690/dsdt.asl
   trunk/src/mainboard/nokia/ip530/irq_tables.c
   trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
   trunk/src/mainboard/supermicro/h8dme/ap_romstage.c
   trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c
   trunk/src/mainboard/supermicro/x6dai_g/romstage.c
   trunk/src/mainboard/supermicro/x6dhe_g/romstage.c
   trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c
   trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c
   trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c
   trunk/src/mainboard/technexion/tim5690/dsdt.asl
   trunk/src/mainboard/technexion/tim8690/dsdt.asl
   trunk/src/mainboard/via/epia-m700/romstage.c
   trunk/src/mainboard/via/epia-m700/wakeup.c
   trunk/src/northbridge/amd/amdfam10/acpi.c
   trunk/src/northbridge/amd/amdk8/acpi.c

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile      Fri Dec 10 13:52:50 2010        (r6160)
+++ trunk/Makefile      Sat Dec 11 21:33:41 2010        (r6161)
@@ -114,7 +114,7 @@
 
 strip_quotes = $(subst ",,$(subst \",,$(1)))
 
-ARCHDIR-$(CONFIG_ARCH_X86)    := i386
+ARCHDIR-$(CONFIG_ARCH_X86)    := x86
 ARCHDIR-$(CONFIG_ARCH_POWERPC) := ppc
 
 MAINBOARDDIR=$(call strip_quotes,$(CONFIG_MAINBOARD_DIR))

Modified: trunk/src/Kconfig
==============================================================================
--- trunk/src/Kconfig   Fri Dec 10 13:52:50 2010        (r6160)
+++ trunk/src/Kconfig   Sat Dec 11 21:33:41 2010        (r6161)
@@ -101,7 +101,7 @@
 endmenu
 
 source src/mainboard/Kconfig
-source src/arch/i386/Kconfig
+source src/arch/x86/Kconfig
 
 menu "Chipset"
 
@@ -481,7 +481,7 @@
        default y
        help
          If enabled, you will be able to set breakpoints for gdb debugging.
-         See src/arch/i386/lib/c_start.S for details.
+         See src/arch/x86/lib/c_start.S for details.
 
 config HAVE_DEBUG_RAM_SETUP
        def_bool n
@@ -740,7 +740,7 @@
        help
          If enabled, you will have a low level shell to examine your machine.
          Put llshell() in your (romstage) code to start the shell.
-         See src/arch/i386/llshell/llshell.inc for details.
+         See src/arch/x86/llshell/llshell.inc for details.
 
 endmenu
 

Modified: trunk/src/arch/x86/Makefile.bigbootblock.inc
==============================================================================
--- trunk/src/arch/i386/Makefile.bigbootblock.inc       Thu Dec  9 19:09:14 
2010        (r6158)
+++ trunk/src/arch/x86/Makefile.bigbootblock.inc        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -26,7 +26,7 @@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/crt0.S
        @printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include 
-I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< -o 
$@
+       $(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include 
-I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< -o 
$@
 
 $(obj)/coreboot: $$(romstage-objs) $(obj)/ldscript.ld
        @printf "    LINK       $(subst $(obj)/,,$(@))\n"

Modified: trunk/src/arch/x86/Makefile.bootblock.inc
==============================================================================
--- trunk/src/arch/i386/Makefile.bootblock.inc  Thu Dec  9 19:09:14 2010        
(r6158)
+++ trunk/src/arch/x86/Makefile.bootblock.inc   Sat Dec 11 21:33:41 2010        
(r6161)
@@ -23,24 +23,24 @@
        @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
        $(OBJCOPY) -O binary $< $@
 
-bootblock_lds = $(src)/arch/i386/init/ldscript_failover.lb
+bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
 bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
 bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
-bootblock_lds += $(src)/arch/i386/lib/id.lds
+bootblock_lds += $(src)/arch/x86/lib/id.lds
 bootblock_lds += $(chipset_bootblock_lds)
 
-bootblock_inc = $(src)/arch/i386/init/prologue.inc
+bootblock_inc = $(src)/arch/x86/init/prologue.inc
 bootblock_inc += $(src)/cpu/x86/16bit/entry16.inc
 bootblock_inc += $(src)/cpu/x86/16bit/reset16.inc
 bootblock_inc += $(src)/cpu/x86/32bit/entry32.inc
-bootblock_inc += $(src)/arch/i386/lib/id.inc
+bootblock_inc += $(src)/arch/x86/lib/id.inc
 bootblock_inc += $(chipset_bootblock_inc)
 
 ifeq ($(CONFIG_SSE),y)
 bootblock_inc += $(src)/cpu/x86/sse_enable.inc
 endif
 bootblock_inc += $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc
-bootblock_inc += $(src)/arch/i386/lib/walkcbfs.S
+bootblock_inc += $(src)/arch/x86/lib/walkcbfs.S
 
 bootblock_romccflags := -mcpu=i386 -O2 -D__PRE_RAM__
 ifeq ($(CONFIG_SSE),y)
@@ -63,9 +63,9 @@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.S
        @printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include 
-I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@
+       $(CC) -MMD -DASSEMBLY -E -I$(src)/include -I$(src)/arch/x86/include 
-I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< -o $@
 
-$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/i386/init/$(subst 
",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc
+$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/x86/init/$(subst 
",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc
        @printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
        $(CC) -MM -MT$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc \
                $< > $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc.d
@@ -113,5 +113,5 @@
 
 $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(obj)/romstage/crt0.S
        @printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include 
-I$(src)/arch/i386/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h 
-I. -I$(src) $< -o $@
+       $(CC) -MMD -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include 
-I$(src)/arch/x86/include -I$(obj) -I$(obj)/romstage -include $(obj)/config.h 
-I. -I$(src) $< -o $@
 

Modified: trunk/src/arch/x86/Makefile.inc
==============================================================================
--- trunk/src/arch/i386/Makefile.inc    Thu Dec  9 19:09:14 2010        (r6158)
+++ trunk/src/arch/x86/Makefile.inc     Sat Dec 11 21:33:41 2010        (r6161)
@@ -107,17 +107,17 @@
 #######################################################################
 # Build the coreboot_ram (stage 2)
 
-$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/i386/coreboot_ram.ld 
#ldoptions
+$(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/arch/x86/coreboot_ram.ld 
#ldoptions
        @printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T 
$(src)/arch/i386/coreboot_ram.ld $(obj)/coreboot_ram.o
+       $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T 
$(src)/arch/x86/coreboot_ram.ld $(obj)/coreboot_ram.o
        $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map
        $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ram.debug
        $(OBJCOPY) --strip-debug $@
        $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ram.debug $@
 
-$(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.ramstage.o $$(driver-objs) 
$(obj)/coreboot.a $(LIBGCC_FILE_NAME)
+$(obj)/coreboot_ram.o: $(obj)/arch/x86/lib/c_start.ramstage.o $$(driver-objs) 
$(obj)/coreboot.a $(LIBGCC_FILE_NAME)
        @printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.ramstage.o 
$(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 
-Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) 
-Wl,--end-group
+       $(CC) -nostdlib -r -o $@ $(obj)/arch/x86/lib/c_start.ramstage.o 
$(driver-objs) -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 
-Wl,--wrap,__umoddi3 -Wl,--start-group $(obj)/coreboot.a $(LIBGCC_FILE_NAME) 
-Wl,--end-group
 
 $(obj)/coreboot.a: $$(ramstage-objs)
        @printf "    AR         $(subst $(obj)/,,$(@))\n"
@@ -131,7 +131,7 @@
 
 $(obj)/coreboot_ap: $(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o
        @printf "    CC         $(subst $(obj)/,,$(@))\n"
-       $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T 
$(src)/arch/i386/init/ldscript_apc.lb $^
+       $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T 
$(src)/arch/x86/init/ldscript_apc.lb $^
        $(OBJCOPY) --only-keep-debug $@ $(obj)/coreboot_ap.debug
        $(OBJCOPY) --strip-debug $@
        $(OBJCOPY) --add-gnu-debuglink=$(obj)/coreboot_ap.debug $@
@@ -143,9 +143,9 @@
 #######################################################################
 # done
 
-crt0s = $(src)/arch/i386/init/prologue.inc
+crt0s = $(src)/arch/x86/init/prologue.inc
 ldscripts =
-ldscripts += $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscripts += $(src)/arch/x86/init/ldscript_fallback_cbfs.lb
 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 crt0s += $(src)/cpu/x86/16bit/entry16.inc
 ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -155,8 +155,8 @@
 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
 crt0s += $(src)/cpu/x86/16bit/reset16.inc
 ldscripts += $(src)/cpu/x86/16bit/reset16.lds
-crt0s += $(src)/arch/i386/lib/id.inc
-ldscripts += $(src)/arch/i386/lib/id.lds
+crt0s += $(src)/arch/x86/lib/id.inc
+ldscripts += $(src)/arch/x86/lib/id.lds
 endif
 
 crt0s += $(src)/cpu/x86/fpu_enable.inc
@@ -174,7 +174,7 @@
 endif
 
 ifeq ($(CONFIG_LLSHELL),y)
-crt0s += $(src)/arch/i386/llshell/llshell.inc
+crt0s += $(src)/arch/x86/llshell/llshell.inc
 endif
 
 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
@@ -192,7 +192,7 @@
 endif
 
 ifeq ($(CONFIG_ROMCC),y)
-crt0s += $(src)/arch/i386/init/crt0_romcc_epilogue.inc
+crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc
 endif
 
 ifeq ($(CONFIG_ROMCC),y)
@@ -251,7 +251,7 @@
 endif
 
 ifeq ($(CONFIG_TINY_BOOTBLOCK),y)
-include $(src)/arch/i386/Makefile.bootblock.inc
+include $(src)/arch/x86/Makefile.bootblock.inc
 else
-include $(src)/arch/i386/Makefile.bigbootblock.inc
+include $(src)/arch/x86/Makefile.bigbootblock.inc
 endif

Modified: trunk/src/arch/x86/boot/Makefile.inc
==============================================================================
--- trunk/src/arch/i386/boot/Makefile.inc       Thu Dec  9 19:09:14 2010        
(r6158)
+++ trunk/src/arch/x86/boot/Makefile.inc        Sat Dec 11 21:33:41 2010        
(r6161)
@@ -9,5 +9,5 @@
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpigen.c
 ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
 
-$(obj)/arch/i386/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
+$(obj)/arch/x86/boot/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
 

Modified: trunk/src/arch/x86/init/Makefile.inc
==============================================================================
--- trunk/src/arch/i386/init/Makefile.inc       Thu Dec  9 19:09:14 2010        
(r6158)
+++ trunk/src/arch/x86/init/Makefile.inc        Sat Dec 11 21:33:41 2010        
(r6161)
@@ -1 +1 @@
-# If you add something to this file, enable it in src/arch/i386/Makefile.inc 
first.
+# If you add something to this file, enable it in src/arch/x86/Makefile.inc 
first.

Modified: trunk/src/arch/x86/lib/Makefile.inc
==============================================================================
--- trunk/src/arch/i386/lib/Makefile.inc        Thu Dec  9 19:09:14 2010        
(r6158)
+++ trunk/src/arch/x86/lib/Makefile.inc Sat Dec 11 21:33:41 2010        (r6161)
@@ -10,4 +10,4 @@
 romstage-y += printk_init.c
 romstage-y += cbfs_and_run.c
 
-$(obj)/arch/i386/lib/console.ramstage.o :: $(obj)/build.h
+$(obj)/arch/x86/lib/console.ramstage.o :: $(obj)/build.h

Modified: trunk/src/cpu/via/model_c7/model_c7_init.c
==============================================================================
--- trunk/src/cpu/via/model_c7/model_c7_init.c  Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/cpu/via/model_c7/model_c7_init.c  Sat Dec 11 21:33:41 2010        
(r6161)
@@ -213,7 +213,7 @@
        .init = model_c7_init,
 };
 
-/* Look in arch/i386/lib/cpu.c:cpu_initialize. If there is no CPU with an exact
+/* Look in arch/x86/lib/cpu.c:cpu_initialize. If there is no CPU with an exact
  * ID, the cpu mask (stepping) is masked out and the check is repeated. This
  * allows us to keep the table significantly smaller.
  */

Modified: trunk/src/include/lib.h
==============================================================================
--- trunk/src/include/lib.h     Fri Dec 10 13:52:50 2010        (r6160)
+++ trunk/src/include/lib.h     Sat Dec 11 21:33:41 2010        (r6161)
@@ -32,7 +32,7 @@
 /* Defined in src/lib/lzma.c */
 unsigned long ulzma(unsigned char *src, unsigned char *dst);
 
-/* Defined in src/arch/i386/boot/gdt.c */
+/* Defined in src/arch/x86/boot/gdt.c */
 void move_gdt(void);
 
 /* Defined in src/lib/ramtest.c */

Modified: trunk/src/mainboard/amd/dbm690t/dsdt.asl
==============================================================================
--- trunk/src/mainboard/amd/dbm690t/dsdt.asl    Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/amd/dbm690t/dsdt.asl    Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/amd/mahogany/dsdt.asl
==============================================================================
--- trunk/src/mainboard/amd/mahogany/dsdt.asl   Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/amd/mahogany/dsdt.asl   Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1120,7 +1120,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/amd/mahogany_fam10/dsdt.asl
==============================================================================
--- trunk/src/mainboard/amd/mahogany_fam10/dsdt.asl     Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/amd/mahogany_fam10/dsdt.asl     Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/amd/pistachio/dsdt.asl
==============================================================================
--- trunk/src/mainboard/amd/pistachio/dsdt.asl  Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/amd/pistachio/dsdt.asl  Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1122,7 +1122,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c     Fri Dec 10 
13:52:50 2010        (r6160)
+++ trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c     Sat Dec 11 
21:33:41 2010        (r6161)
@@ -12,7 +12,7 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include "pc80/serial.c"
-#include "./arch/i386/lib/printk_init.c"
+#include "./arch/x86/lib/printk_init.c"
 
 #include "console/console.c"
 #include "lib/uart8250.c"

Modified: trunk/src/mainboard/amd/tilapia_fam10/dsdt.asl
==============================================================================
--- trunk/src/mainboard/amd/tilapia_fam10/dsdt.asl      Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/amd/tilapia_fam10/dsdt.asl      Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/asrock/939a785gmh/dsdt.asl
==============================================================================
--- trunk/src/mainboard/asrock/939a785gmh/dsdt.asl      Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/asrock/939a785gmh/dsdt.asl      Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
        #include "northbridge/amd/amdk8/util.asl"
 
        Name(HPBA, 0xFED00000)  /* Base address of HPET table */
@@ -460,7 +460,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/asus/m4a78-em/dsdt.asl
==============================================================================
--- trunk/src/mainboard/asus/m4a78-em/dsdt.asl  Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/asus/m4a78-em/dsdt.asl  Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/asus/m4a785-m/dsdt.asl
==============================================================================
--- trunk/src/mainboard/asus/m4a785-m/dsdt.asl  Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/asus/m4a785-m/dsdt.asl  Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/dell/s1850/romstage.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/romstage.c   Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/dell/s1850/romstage.c   Sat Dec 11 21:33:41 2010        
(r6161)
@@ -142,7 +142,7 @@
 
 /* end IPMI garbage */
 
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c      Fri Dec 10 
13:52:50 2010        (r6160)
+++ trunk/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c      Sat Dec 11 
21:33:41 2010        (r6161)
@@ -37,7 +37,7 @@
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
-#include "arch/i386/lib/printk_init.c"
+#include "arch/x86/lib/printk_init.c"
 #include "console/vtxprintf.c"
 #include "console/console.c"
 

Modified: trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c   Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c   Sat Dec 11 21:33:41 
2010        (r6161)
@@ -35,7 +35,7 @@
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
-#include "arch/i386/lib/printk_init.c"
+#include "arch/x86/lib/printk_init.c"
 #include "console/vtxprintf.c"
 #include "console/console.c"
 

Modified: trunk/src/mainboard/gigabyte/ma785gmt/dsdt.asl
==============================================================================
--- trunk/src/mainboard/gigabyte/ma785gmt/dsdt.asl      Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/gigabyte/ma785gmt/dsdt.asl      Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/gigabyte/ma78gm/dsdt.asl
==============================================================================
--- trunk/src/mainboard/gigabyte/ma78gm/dsdt.asl        Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/gigabyte/ma78gm/dsdt.asl        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/iei/kino-780am2-fam10/dsdt.asl
==============================================================================
--- trunk/src/mainboard/iei/kino-780am2-fam10/dsdt.asl  Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/iei/kino-780am2-fam10/dsdt.asl  Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/intel/jarrell/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/jarrell/romstage.c        Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/intel/jarrell/romstage.c        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -37,7 +37,7 @@
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 #include "debug.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/intel/mtarvon/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/mtarvon/romstage.c        Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/intel/mtarvon/romstage.c        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -50,7 +50,7 @@
 #include "northbridge/intel/i3100/raminit.c"
 #include "lib/generic_sdram.c"
 #if 0 /* skip_romstage doesn't compile with gcc */
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 #endif
 
 void main(unsigned long bist)

Modified: trunk/src/mainboard/intel/truxton/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/truxton/romstage.c        Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/intel/truxton/romstage.c        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -48,7 +48,7 @@
 #include "northbridge/intel/i3100/raminit_ep80579.c"
 #include "lib/generic_sdram.c"
 #include "../../intel/jarrell/debug.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
 

Modified: trunk/src/mainboard/intel/xe7501devkit/irq_tables.c
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/irq_tables.c Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/intel/xe7501devkit/irq_tables.c Sat Dec 11 21:33:41 
2010        (r6161)
@@ -31,7 +31,7 @@
        0xB1,                                                                   
// Checksum of the entire structure (causes 8-bit sum == 0)
        {
                // NOTE: For 82801, a nonzero link value is a pointer to a 
PIRQ[n]_ROUT register in PCI configuration space
-               //               This was determined from 
linux-2.6.11/arch/i386/pci/irq.c
+               //               This was determined from 
linux-2.6.11/arch/x86/pci/irq.c
                // bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or 
IRQ14-IRQ15
                // ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, 
IRQ2, IRQ8, or IRQ13
                // Not sure why IRQ9 isn't routable (inherited from Tyan S2735)

Modified: trunk/src/mainboard/jetway/pa78vm5/dsdt.asl
==============================================================================
--- trunk/src/mainboard/jetway/pa78vm5/dsdt.asl Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/jetway/pa78vm5/dsdt.asl Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1162,7 +1162,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/kontron/kt690/dsdt.asl
==============================================================================
--- trunk/src/mainboard/kontron/kt690/dsdt.asl  Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/kontron/kt690/dsdt.asl  Sat Dec 11 21:33:41 2010        
(r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/nokia/ip530/irq_tables.c
==============================================================================
--- trunk/src/mainboard/nokia/ip530/irq_tables.c        Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/nokia/ip530/irq_tables.c        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -81,7 +81,7 @@
 
 /**
  * TODO: This stub function is here until the point is solved in the
- * main code of coreboot. see also arch/i386/boot/pirq_tables.c
+ * main code of coreboot. see also arch/x86/boot/pirq_tables.c
  */
 void pirq_assign_irqs(const unsigned char pIntAtoD[4])
 {

Modified: trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c    Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/nvidia/l1_2pvv/ap_romstage.c    Sat Dec 11 21:33:41 
2010        (r6161)
@@ -35,7 +35,7 @@
 #include "pc80/serial.c"
 
 #include "lib/uart8250.c"
-#include "arch/i386/lib/printk_init.c"
+#include "arch/x86/lib/printk_init.c"
 #include "console/vtxprintf.c"
 #include "console/console.c"
 

Modified: trunk/src/mainboard/supermicro/h8dme/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/ap_romstage.c  Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/h8dme/ap_romstage.c  Sat Dec 11 21:33:41 
2010        (r6161)
@@ -37,7 +37,7 @@
 #include "console/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
-#include "./arch/i386/lib/printk_init.c"
+#include "./arch/x86/lib/printk_init.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"

Modified: trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c  Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c  Sat Dec 11 21:33:41 
2010        (r6161)
@@ -37,7 +37,7 @@
 #include "console/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
-#include "./arch/i386/lib/printk_init.c"
+#include "./arch/x86/lib/printk_init.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"

Modified: trunk/src/mainboard/supermicro/x6dai_g/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dai_g/romstage.c   Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/x6dai_g/romstage.c   Sat Dec 11 21:33:41 
2010        (r6161)
@@ -41,7 +41,7 @@
 
 #include "northbridge/intel/e7525/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c   Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c   Sat Dec 11 21:33:41 
2010        (r6161)
@@ -45,7 +45,7 @@
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c  Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c  Sat Dec 11 21:33:41 
2010        (r6161)
@@ -42,7 +42,7 @@
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c  Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c  Sat Dec 11 21:33:41 
2010        (r6161)
@@ -44,7 +44,7 @@
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c Sat Dec 11 21:33:41 
2010        (r6161)
@@ -44,7 +44,7 @@
 
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
-#include "arch/i386/lib/stages.c"
+#include "arch/x86/lib/stages.c"
 
 static void main(unsigned long bist)
 {

Modified: trunk/src/mainboard/technexion/tim5690/dsdt.asl
==============================================================================
--- trunk/src/mainboard/technexion/tim5690/dsdt.asl     Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/technexion/tim5690/dsdt.asl     Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/technexion/tim8690/dsdt.asl
==============================================================================
--- trunk/src/mainboard/technexion/tim8690/dsdt.asl     Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/technexion/tim8690/dsdt.asl     Sat Dec 11 21:33:41 
2010        (r6161)
@@ -27,7 +27,7 @@
        0x00010001      /* OEM Revision */
        )
 {      /* Start of ASL file */
-       /* #include "../../../arch/i386/acpi/debug.asl" */              /* 
Include global debug methods if needed */
+       /* #include "../../../arch/x86/acpi/debug.asl" */               /* 
Include global debug methods if needed */
 
        /* Data to be patched by the BIOS during POST */
        /* FIXME the patching is not done yet! */
@@ -1123,7 +1123,7 @@
 
        /* South Bridge */
        Scope(\_SB) { /* Start \_SB scope */
-               #include "../../../arch/i386/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
+               #include "../../../arch/x86/acpi/globutil.asl" /* global 
utility methods expected within the \_SB scope */
 
                /*  _SB.PCI0 */
                /* Note: Only need HID on Primary Bus */

Modified: trunk/src/mainboard/via/epia-m700/romstage.c
==============================================================================
--- trunk/src/mainboard/via/epia-m700/romstage.c        Fri Dec 10 13:52:50 
2010        (r6160)
+++ trunk/src/mainboard/via/epia-m700/romstage.c        Sat Dec 11 21:33:41 
2010        (r6161)
@@ -424,7 +424,7 @@
 
        /*
         * There are two function definitions of console_init(), while the
-        * src/arch/i386/lib is the right one.
+        * src/arch/x86/lib is the right one.
         */
        console_init();
 

Modified: trunk/src/mainboard/via/epia-m700/wakeup.c
==============================================================================
--- trunk/src/mainboard/via/epia-m700/wakeup.c  Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/mainboard/via/epia-m700/wakeup.c  Sat Dec 11 21:33:41 2010        
(r6161)
@@ -323,7 +323,7 @@
  * ----------------------------------------------------------------------- */
 
 /*
- * arch/i386/boot/a20.c
+ * arch/x86/boot/a20.c
  *
  * Enable A20 gate (return -1 on failure)
  */

Modified: trunk/src/northbridge/amd/amdfam10/acpi.c
==============================================================================
--- trunk/src/northbridge/amd/amdfam10/acpi.c   Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/northbridge/amd/amdfam10/acpi.c   Sat Dec 11 21:33:41 2010        
(r6161)
@@ -26,7 +26,7 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "amdfam10.h"
 
-//it seems some functions can be moved arch/i386/boot/acpi.c
+//it seems some functions can be moved arch/x86/boot/acpi.c
 
 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 
lint)
 {

Modified: trunk/src/northbridge/amd/amdk8/acpi.c
==============================================================================
--- trunk/src/northbridge/amd/amdk8/acpi.c      Fri Dec 10 13:52:50 2010        
(r6160)
+++ trunk/src/northbridge/amd/amdk8/acpi.c      Sat Dec 11 21:33:41 2010        
(r6161)
@@ -33,7 +33,7 @@
 #include <cpu/amd/amdk8_sysconf.h>
 #include "acpi.h"
 
-//it seems some functions can be moved arch/i386/boot/acpi.c
+//it seems some functions can be moved arch/x86/boot/acpi.c
 
 unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 
lint)
 {

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