See patch.
Uwe.
--
http://hermann-uwe.de | http://sigrok.org
http://randomprojects.org | http://unmaintained-free-software.org
Add TINY_BOOTBLOCK support for the SiS966 southbridge.
Signed-off-by: Uwe Hermann <u...@hermann-uwe.de>
Index: src/southbridge/sis/sis966/Kconfig
===================================================================
--- src/southbridge/sis/sis966/Kconfig (Revision 6181)
+++ src/southbridge/sis/sis966/Kconfig (Arbeitskopie)
@@ -2,7 +2,12 @@
bool
select IOAPIC
select HAVE_USBDEBUG
+ select TINY_BOOTBLOCK
+config BOOTBLOCK_SOUTHBRIDGE_INIT
+ string
+ default "southbridge/sis/sis966/bootblock.c" if SOUTHBRIDGE_SIS_SIS966
+
config ID_SECTION_OFFSET
hex
default 0x80 if SOUTHBRIDGE_SIS_SIS966
Index: src/southbridge/sis/sis966/ide.c
===================================================================
--- src/southbridge/sis/sis966/ide.c (Revision 6181)
+++ src/southbridge/sis/sis966/ide.c (Arbeitskopie)
@@ -30,6 +30,7 @@
#include <device/pci_ops.h>
#include <arch/io.h>
#include "sis966.h"
+#include "chip.h"
uint8_t SiS_SiS5513_init[49][3]={
{0x04, 0xFF, 0x05},
Index: src/southbridge/sis/sis966/enable_rom.c
===================================================================
--- src/southbridge/sis/sis966/enable_rom.c (Revision 6181)
+++ src/southbridge/sis/sis966/enable_rom.c (Arbeitskopie)
@@ -1,41 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Tyan Computer
- * Written by Yinghai Lu <y...@tyan.com> for Tyan Computer.
- * Copyright (C) 2006,2007 AMD
- * Written by Yinghai Lu <yinghai...@amd.com> for AMD.
- * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
- * Written by Morgan Tsai <my_t...@sis.com> for SiS.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
- #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE
-#else
- #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
-#endif
-
-static void sis966_enable_rom(void)
-{
- device_t addr;
-
- /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
- addr = pci_locate_device(PCI_ID(0x1039, 0x0966), 0);
-
- /* Set the 4MB enable bit bit */
- pci_write_config8(addr, 0x40, pci_read_config8(addr, 0x40) | 0x11);
-}
Index: src/southbridge/sis/sis966/enable_usbdebug.c
===================================================================
--- src/southbridge/sis/sis966/enable_usbdebug.c (Revision 6181)
+++ src/southbridge/sis/sis966/enable_usbdebug.c (Arbeitskopie)
@@ -30,12 +30,6 @@
#include <device/pci_def.h>
#include "sis966.h"
-#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
-#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE
-#else
-#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
-#endif
-
void set_debug_port(unsigned int port)
{
u32 dword;
Index: src/southbridge/sis/sis966/sis966.h
===================================================================
--- src/southbridge/sis/sis966/sis966.h (Revision 6181)
+++ src/southbridge/sis/sis966/sis966.h (Arbeitskopie)
@@ -22,6 +22,12 @@
#ifndef SIS966_H
#define SIS966_H
+#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE
+#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE
+#else
+#define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE
+#endif
+
#define DEBUG_AZA 0
#define DEBUG_NIC 0
#define DEBUG_IDE 0
@@ -29,9 +35,12 @@
#define DEBUG_USB 0
#define DEBUG_USB2 0
-#include "chip.h"
+#if !defined(__ROMCC__)
+void sis966_enable(device_t dev);
+#endif
-void sis966_enable(device_t dev);
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
void sis966_enable_usbdebug(unsigned int port);
+#endif
#endif /* SIS966_H */
Index: src/southbridge/sis/sis966/bootblock.c
===================================================================
--- src/southbridge/sis/sis966/bootblock.c (Revision 0)
+++ src/southbridge/sis/sis966/bootblock.c (Revision 0)
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Tyan Computer
+ * Written by Yinghai Lu <y...@tyan.com> for Tyan Computer.
+ * Copyright (C) 2006,2007 AMD
+ * Written by Yinghai Lu <yinghai...@amd.com> for AMD.
+ * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
+ * Written by Morgan Tsai <my_t...@sis.com> for SiS.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_ids.h>
+#include "sis966.h"
+
+static void sis966_enable_rom(void)
+{
+ device_t addr;
+
+ /* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */
+ addr = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS,
+ PCI_DEVICE_ID_SIS_SIS966_LPC), 0);
+
+ /* Set the 4MB enable bit(s). */
+ pci_write_config8(addr, 0x40, pci_read_config8(addr, 0x40) | 0x11);
+}
+
+static void bootblock_southbridge_init(void)
+{
+ sis966_enable_rom();
+}
Index: src/mainboard/gigabyte/ga_2761gxdk/romstage.c
===================================================================
--- src/mainboard/gigabyte/ga_2761gxdk/romstage.c (Revision 6181)
+++ src/mainboard/gigabyte/ga_2761gxdk/romstage.c (Arbeitskopie)
@@ -40,7 +40,6 @@
#include <cpu/amd/model_fxx_rev.h>
#include "southbridge/sis/sis966/sis966.h"
#include "southbridge/sis/sis966/early_smbus.c"
-#include "southbridge/sis/sis966/enable_rom.c"
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
@@ -131,7 +130,6 @@
/* Allow the HT devices to be found */
enumerate_ht_chain();
sio_setup();
- sis966_enable_rom();
}
if (bist == 0)
--
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