Nice work, Rudolf! > Index: src/mainboard/asrock/939a785gmh/romstage.c > =================================================================== > --- src/mainboard/asrock/939a785gmh/romstage.c (revision 6298) > +++ src/mainboard/asrock/939a785gmh/romstage.c (working copy) > @@ -48,6 +48,9 @@ > #include "southbridge/amd/sb700/early_setup.c" > #include "northbridge/amd/amdk8/debug.c" /* After sb700/early_setup.c! */ > > +#include "option_table.h" > + > + > #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) > #define GPIO2345_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V) > > @@ -74,7 +77,20 @@ > static void sio_init(void) > { > u8 reg; > + u8 mem_volt = read_option(CMOS_VSTART_memory_voltage, > CMOS_VLEN_memory_voltage, 0); > + u8 ht_volt = read_option(CMOS_VSTART_ht_voltage, CMOS_VLEN_ht_voltage, > 0); > + u8 gpu_volt = read_option(CMOS_VSTART_gpu_voltage, > CMOS_VLEN_gpu_voltage, 0); > + u8 sideport_volt = read_option(CMOS_VSTART_sideport_voltage, > CMOS_VLEN_sideport_voltage, 0);
Should these defaults really be all 0? The old defaults seem to be 1 for gpu_volt, and 6 for sideport_volt, 1 for ht_volt Stefan -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot