Author: mjones
Date: Mon Feb 14 19:52:15 2011
New Revision: 6349
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6349

Log:
This code provides support for the superio chip on the IBASE Technology DB-FT1 
(AMD code name Persimmon) platform. It is independent of the  AMD code.

Signed-off-by: Frank Vibrans <frank.vibr...@amd.com>
Acked-by: Stefan Reinauer <stefan.reina...@coreboot.org>
Acked-by: Marc Jones <marcj...@gmail.com>

Added:
   trunk/src/superio/fintek/f81865f/
   trunk/src/superio/fintek/f81865f/Makefile.inc
   trunk/src/superio/fintek/f81865f/chip.h
   trunk/src/superio/fintek/f81865f/f81865f.h
   trunk/src/superio/fintek/f81865f/f81865f_early_serial.c
   trunk/src/superio/fintek/f81865f/superio.c
Modified:
   trunk/src/superio/fintek/Kconfig
   trunk/src/superio/fintek/Makefile.inc

Modified: trunk/src/superio/fintek/Kconfig
==============================================================================
--- trunk/src/superio/fintek/Kconfig    Mon Feb 14 19:47:37 2011        (r6348)
+++ trunk/src/superio/fintek/Kconfig    Mon Feb 14 19:52:15 2011        (r6349)
@@ -27,3 +27,5 @@
        bool
 config SUPERIO_FINTEK_F71889
        bool
+config SUPERIO_FINTEK_F81865F
+       bool

Modified: trunk/src/superio/fintek/Makefile.inc
==============================================================================
--- trunk/src/superio/fintek/Makefile.inc       Mon Feb 14 19:47:37 2011        
(r6348)
+++ trunk/src/superio/fintek/Makefile.inc       Mon Feb 14 19:52:15 2011        
(r6349)
@@ -22,3 +22,4 @@
 subdirs-y += f71863fg
 subdirs-y += f71872
 subdirs-y += f71889
+subdirs-y += f81865f

Added: trunk/src/superio/fintek/f81865f/Makefile.inc
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ trunk/src/superio/fintek/f81865f/Makefile.inc       Mon Feb 14 19:52:15 
2011        (r6349)
@@ -0,0 +1,21 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011 Advanced Micro Devices, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+ramstage-$(CONFIG_SUPERIO_FINTEK_F81865F) += superio.c

Added: trunk/src/superio/fintek/f81865f/chip.h
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ trunk/src/superio/fintek/f81865f/chip.h     Mon Feb 14 19:52:15 2011        
(r6349)
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#ifndef SUPERIO_FINTEK_F81865_CHIP_H
+#define SUPERIO_FINTEK_F81865_CHIP_H
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+/* This chip doesn't have keyboard and mouse support. */
+
+extern struct chip_operations superio_fintek_f81865f_ops;
+
+struct superio_fintek_f81865f_config {
+       struct uart8250 com1, com2;
+       struct pc_keyboard keyboard;
+};
+
+#endif

Added: trunk/src/superio/fintek/f81865f/f81865f.h
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ trunk/src/superio/fintek/f81865f/f81865f.h  Mon Feb 14 19:52:15 2011        
(r6349)
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/*
+ * Datasheet:
+ *  - Name: F81865F/F-I
+ */
+#ifndef SUPERIO_FINTEK_F81865_F81865_H
+#define SUPERIO_FINTEK_F81865_F81865_H
+
+/* Logical Device Numbers (LDN). */
+#define        F81865F_FDC     0x00    /* Floppy */
+#define        F81865F_SP1     0x10    /* UART1 */
+#define        F81865F_SP2     0x11    /* UART2 */
+#define        F81865F_PP      0x03    /* Parallel Port */
+#define        F81865F_HWM     0x04    /* Hardware Monitor */
+#define        F81865F_KBC     0x05    /* Keyboard/Mouse */
+#define        F81865F_GPIO    0x06    /* General Purpose I/O (GPIO) */
+#define        F81865F_PME     0x0a    /* Power Management Events (PME) */
+
+#endif

Added: trunk/src/superio/fintek/f81865f/f81865f_early_serial.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ trunk/src/superio/fintek/f81865f/f81865f_early_serial.c     Mon Feb 14 
19:52:15 2011        (r6349)
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Pre-RAM driver for the Fintek F81865F/FG Super I/O chip. */
+
+#include <arch/romcc_io.h>
+#include "f81865f.h"
+
+static void pnp_enter_conf_state(device_t dev)
+{
+       u16 port = dev >> 8;
+       outb(0x87, port);
+       outb(0x87, port);
+}
+
+static void pnp_exit_conf_state(device_t dev)
+{
+       u16 port = dev >> 8;
+       outb(0xaa, port);
+}
+
+static void f81865f_enable_serial(device_t dev, u16 iobase)
+{
+       pnp_enter_conf_state(dev);
+       pnp_set_logical_device(dev);
+       pnp_set_enable(dev, 0);
+       pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+       pnp_set_enable(dev, 1);
+       pnp_exit_conf_state(dev);
+}

Added: trunk/src/superio/fintek/f81865f/superio.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ trunk/src/superio/fintek/f81865f/superio.c  Mon Feb 14 19:52:15 2011        
(r6349)
@@ -0,0 +1,114 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <stdlib.h>
+#include "chip.h"
+#include "f81865f.h"
+
+static void pnp_enter_conf_state(device_t dev)
+{
+       outb(0x87, dev->path.pnp.port);
+       outb(0x87, dev->path.pnp.port);
+}
+
+static void pnp_exit_conf_state(device_t dev)
+{
+       outb(0xaa, dev->path.pnp.port);
+}
+
+static void f81865f_init(device_t dev)
+{
+       struct superio_fintek_f81865f_config *conf = dev->chip_info;
+       struct resource *res0;
+
+       if (!dev->enabled)
+               return;
+
+       switch (dev->path.pnp.device) {
+       /* TODO: Might potentially need code for HWM or FDC etc. */
+       case F81865F_SP1:
+               res0 = find_resource(dev, PNP_IDX_IO0);
+               init_uart8250(res0->base, &conf->com1);
+               break;
+       case F81865F_SP2:
+               res0 = find_resource(dev, PNP_IDX_IO0);
+               init_uart8250(res0->base, &conf->com2);
+               break;
+       case F81865F_KBC:
+               pc_keyboard_init(&conf->keyboard);
+               break;
+       }
+}
+
+static void f81865f_pnp_set_resources(device_t dev)
+{
+       pnp_enter_conf_state(dev);
+       pnp_set_resources(dev);
+       pnp_exit_conf_state(dev);
+}
+
+static void f81865f_pnp_enable_resources(device_t dev)
+{
+       pnp_enter_conf_state(dev);
+       pnp_enable_resources(dev);
+       pnp_exit_conf_state(dev);
+}
+
+static void f81865f_pnp_enable(device_t dev)
+{
+       pnp_enter_conf_state(dev);
+       pnp_set_logical_device(dev);
+       (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
+       pnp_exit_conf_state(dev);
+}
+
+static struct device_operations ops = {
+       .read_resources   = pnp_read_resources,
+       .set_resources    = f81865f_pnp_set_resources,
+       .enable_resources = f81865f_pnp_enable_resources,
+       .enable           = f81865f_pnp_enable,
+       .init             = f81865f_init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+       /* TODO: Some of the 0x7f8 etc. values may not be correct. */
+       { &ops, F81865F_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+       { &ops, F81865F_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+       { &ops, F81865F_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+       { &ops, F81865F_KBC,  PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
+       { &ops, F81865F_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+       { &ops, F81865F_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
+       { &ops, F81865F_GPIO, PNP_IRQ0, },
+       { &ops, F81865F_PME, },
+};
+
+static void enable_dev(device_t dev)
+{
+       pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_fintek_f81865f_ops = {
+       CHIP_NAME("Fintek F81865F Super I/O")
+       .enable_dev = enable_dev
+};

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