Raised debug level in SeaBIOS. Here is what's new from "Running option rom at c800:0003" in the old log:
pmm call arg1=0 pmm00: length=1000 handle=29400131 flags=1 pmm_malloc zone=0x000f5770 handle=29400131 size=65536 align=10 ret=0x00080000 () pmm call arg1=0 pmm00: length=400 handle=29400132 flags=1 pmm_malloc zone=0x000f5770 handle=29400132 size=16384 align=10 ret=0x0007c000 () pnp call arg1=60 pnp call arg1=61 invalid handle_1ab103:78: a=0000b103 b=00000000 c=00010000 d=000003bc ds=8000 es=7c00 ss=0000 si=00000001 di=00005387 bp=00006ab2 sp=00006ab0 cs=8000 ip=9f11 f=0002 This is the Ralf Brown Interrupt List entry for the call being made: --------X-1AB103----------------------------- INT 1A - PCI BIOS v2.0c+ - FIND PCI CLASS CODE AX = B103h ECX = class code (see also #F0085,#00878) bits 31-24 unused bits 23-16 class bits 15-8 subclass bits 7-0 programming interface SI = device index (0-n) Return: CF clear if successful CF set on error AH = status (00h,86h) (see #00729) 00h successful BH = bus number BL = device/function number (bits 7-3 device, bits 2-0 func) 86h device not found EAX, EBX, ECX, and EDX may be modified all other flags (except IF) may be modified Notes: this function may require up to 1024 byte of stack; it will not enable interrupts if they were disabled before making the call the meanings of BL and BH on return were exchanged between the initial drafts of the specification and final implementation all devices sharing the same Class Code may be enumerated by incrementing SI from 0 until error 86h is returned SeeAlso: AX=B183h --- It's looking for the second mass storage device in the system, which seems perfectly reasonable. So some PCI bios support seems to be amiss. Something to take to SeaBIOS mailing list? Also I'm finding without the option rom added, Linux now was able to load aic7xxx module and assign an irq to it. I'm not having fun on the SerialICE front. The Fedora qemu is 0.13.0; 0.14.0 has just been released. I have to download 0.11.0 per instructions. I'm using lua 5.1.4 as provided by Fedora, because I'm not sure if my 64bit laptop needs any patch. Website says patch needed on 32bit platforms; the patch is about 64bit. Then once I have the SerialICE chip flashed, qemu patched and compiled, lua stuff in place, then it complains it cannot "index 'regs' because it's nil". So I have no access to any registers and no idea where things are going because I can't see CS:EIP. I'm using the P2B support on P2B-LS. Again I'm trying to figure out how to switch on/off termination for the onboard SCSI. I think I am stuck and need more help. Thanks Keith On Sat, Feb 19, 2011 at 8:31 AM, Idwer Vollering <vid...@gmail.com> wrote: > 2011/2/19 Keith Hui <buu...@gmail.com>: >> I am trying (again) to get the Adaptec SCSI on my P2B-LS to initialize >> properly with coreboot. But it won't boot. >> >> Attached is a serial log of what happened. >> >> After compiling coreboot I checked out SeaBIOS through git and added >> the SCSI option rom extracted from my factory bios. A port and a few >> other resources is assigned, but no IRQ. The SCSI option rom would >> initialize, I can press the hotkey to enter the utility, but that's >> it. That option rom hangs before getting any responses from the SCSI >> hardware. > > You want to see what happens during execution. > Can you create a separate git tree ( git clone > git://git.seabios.org/seabios.git <dirname_of_choice> ) where you run > "make menuconfig" in, then set CONFIG_DEBUG_LEVEL to 8 (make > menuconfig > debugging > debug level) ? Have a look at the other > options too, maybe. > Add the resulting file (out/bios.bin.elf) as the payload. > >> >> I am trying to set up SerialICE to see what is going on. Just looking >> for some insights before I reach that point. >> >> I have to jumper off the SCSI to get it to boot. I don't know if this >> has anything to do but the Ultra2 port on my other P2B-LS is fubared >> and nothing plugged there would register. Afraid the same may befall >> this board too. > > I have an unused dawicontrol dc-974 (scsi2 ?) that I should try booting off. > >> >> Thanks >> Keith >> >> -- >> coreboot mailing list: coreboot@coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot >> > -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot