I like this solution too. Just that it requires hacking sconfig, and
I'm not even close to qualified to actually do it. :)
And this requires sconfig to produce some other output for romstage as
well. The hardware tree it produces is currently only used during
ramstage.
While we're on sconfig, devicetree, superio and romstage, can we add a
facility where I can declare some known, fixed initialization
sequences that needs to be programmed into certain devices?
Suppose my new board requires 0x00 to be written into pnp device 2e.5,
registers 0xf0-0xf5. Can we make it so that it will accept this
declaration, and do it during romstage?
If I need to do it now, I'll need to hijack either of io and drq for
it and can only do it when pnp is initialized in ramstage.
chip superio/foo/bar # Super I/O
device pnp 2e.5 on # PME
reg 0xf0 = 0x00
reg 0xf1 = 0x00
reg 0xf2 = 0x00
reg 0xf3 = 0x00
reg 0xf4 = 0x00
reg 0xf5 = 0x00
end
Thanks
On Thu, Mar 3, 2011 at 3:40 AM, Alex G. <mr.nuke...@gmail.com> wrote:
> On 03/03/2011 09:35 AM, Georgi, Patrick wrote:
>> The chipset components in Kconfig could be derived from the
>> devicetree.cb (statically, on config time or before) - this would
>> simplify board config a bit by reducing duplication.
>>
>> Early serial could be managed with a new keyword there
>> ("chip superio/foo/bar early")
>>
>> Thoughts?
> I like the idea. It's long term, and cleaner.
>
> chip superio/foo/bar # Super I/O
> device pnp 2e.1 on # Com1
> io 0x60 = 0x3f8
> irq 0x70 = 4
> serial_console
> end
>
> So not only would we specify that the superio hosts the serial console,
> but also at which address that is, eliminating the need for
> #define SERIAL_DEV PNP_DEV(0x2e, FOOBAR_SP1)
> in romstage.c
>
> +1
>
> Alex
>
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
