See patch
Report GSE chipset and warn if the code has been compiled for the wrong chipset.
It would be nicer to unify the code so that it does all detection at runtime instead of compile time (but that would also significantly increase code size) so if someone else wants to give it a shot... Signed-off-by: Stefan Reinauer <stefan.reina...@coreboot.org> Index: src/northbridge/intel/i945/early_init.c =================================================================== --- src/northbridge/intel/i945/early_init.c (revision 6474) +++ src/northbridge/intel/i945/early_init.c (working copy) @@ -42,7 +42,7 @@ printk(BIOS_INFO, "Mobile Intel(R) 82945GM/GME Express"); break; case 2: - printk(BIOS_INFO, "Mobile Intel(R) 82945GMS/GU Express"); + printk(BIOS_INFO, "Mobile Intel(R) 82945GMS/GU/GSE Express"); break; case 3: printk(BIOS_INFO, "Mobile Intel(R) 82945PM Express"); @@ -91,6 +91,9 @@ printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8); /* Others reserved. */ } printk(BIOS_DEBUG, "\n"); +#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GC) + printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n"); +#endif } static void i945_detect_chipset(void) @@ -137,6 +140,9 @@ printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8); /* Others reserved. */ } printk(BIOS_DEBUG, "\n"); +#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM) + printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n"); +#endif } static void i945_setup_bars(void)
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