Author: mjones Date: Sun May 15 23:18:59 2011 New Revision: 6576 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6576
Log: Configure CIMx to use 33 MHz fast mode for SPD read. Signed-off-by: Scott Duplichan <sc...@notabs.org> Acked-by: Marc Jones <marcj...@gmail.com> Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h Sun May 15 23:13:00 2011 (r6575) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h Sun May 15 23:18:59 2011 (r6576) @@ -116,8 +116,8 @@ #define cimHpetTimerDefault TRUE #define cimHpetMsiDisDefault FALSE // Enable #define cimIrConfigDefault 0x00 // Disable -#define cimSpiFastReadEnableDefault 0x00 // Disable -#define cimSpiFastReadSpeedDefault 0x00 // NULL +#define cimSpiFastReadEnableDefault 0x01 // Enable +#define cimSpiFastReadSpeedDefault 0x01 // 33 MHz // GPP/AB Controller #define cimNbSbGen2Default TRUE #define cimAlinkPhyPllPowerDownDefault TRUE -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
