Author: stuge Date: Mon May 16 02:05:50 2011 New Revision: 6597 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6597
Log: cimx_wrapper/sb800: Fix indent in late.c:sb800_enable() Signed-off-by: Peter Stuge <pe...@stuge.se> Acked-by: Peter Stuge <pe...@stuge.se> Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c Modified: trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c ============================================================================== --- trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c Mon May 16 01:13:54 2011 (r6596) +++ trunk/src/southbridge/amd/cimx_wrapper/sb800/late.c Mon May 16 02:05:50 2011 (r6597) @@ -413,16 +413,16 @@ break; case (0x15 << 3) | 0: /* 0:15:0 PCIe PortA */ - sb_config->PORTCONFIG[0].PortCfg.PortPresent = dev->enabled; - return; + sb_config->PORTCONFIG[0].PortCfg.PortPresent = dev->enabled; + return; case (0x15 << 3) | 1: /* 0:15:1 PCIe PortB */ - sb_config->PORTCONFIG[1].PortCfg.PortPresent = dev->enabled; - return; + sb_config->PORTCONFIG[1].PortCfg.PortPresent = dev->enabled; + return; case (0x15 << 3) | 2: /* 0:15:2 PCIe PortC */ - sb_config->PORTCONFIG[2].PortCfg.PortPresent = dev->enabled; - return; + sb_config->PORTCONFIG[2].PortCfg.PortPresent = dev->enabled; + return; case (0x15 << 3) | 3: /* 0:15:3 PCIe PortD */ - sb_config->PORTCONFIG[3].PortCfg.PortPresent = dev->enabled; + sb_config->PORTCONFIG[3].PortCfg.PortPresent = dev->enabled; /* * GPP_CFGMODE_X4000: PortA Lanes[3:0] -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot