Author: Sduplichan
Date: Fri May 20 19:50:14 2011
New Revision: 6601
URL: https://tracker.coreboot.org/trac/coreboot/changeset/6601
Log:
Correct amd persimmon romstage code for early SPI prefetch enable.
Signed-off-by: Scott Duplichan <sc...@notabs.org>
Acked-by: Scott Duplichan <sc...@notabs.org>
Modified:
trunk/src/mainboard/amd/persimmon/romstage.c
Modified: trunk/src/mainboard/amd/persimmon/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/persimmon/romstage.c Fri May 20 02:06:09
2011 (r6600)
+++ trunk/src/mainboard/amd/persimmon/romstage.c Fri May 20 19:50:14
2011 (r6601)
@@ -74,7 +74,7 @@
if (boot_cpu())
{
__outdword (0xcf8, 0x8000a3b8);
- __outdword (0xcfc, __indword (0xcfc) | 0 << 24);
+ __outdword (0xcfc, __indword (0xcfc) | 1 << 24);
}
// early enable of SPI 33 MHz fast mode read
--
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