the following patch was just integrated into master:
commit e135ac5a7ea69b6edcb89345019212f5de412b1e
Author: Patrick Georgi <patrick.geo...@secunet.com>
Date: Tue Nov 20 11:53:47 2012 +0100
Remove AMD special case for LAPIC based udelay()
- Optionally override FSB clock detection in generic
LAPIC code with constant value.
- Override on AMD Model fxx, 10xxx, agesa CPUs with 200MHz
- compile LAPIC code for romstage, too
- Remove #include ".../apic_timer.c" in AMD based mainboards
- Remove custom udelay implementation from intel northbridges' romstages
Future work:
- remove the compile time special case
(requires some cpuid based switching)
- drop northbridge udelay implementations (i945, i5000) if
not required anymore (eg. can SMM use the LAPIC timer?)
Change-Id: I25bacaa2163f5e96ab7f3eaf1994ab6899eff054
Signed-off-by: Patrick Georgi <patrick.geo...@secunet.com>
Reviewed-on: http://review.coreboot.org/1618
Reviewed-by: Stefan Reinauer <stefan.reina...@coreboot.org>
Tested-by: Stefan Reinauer <stefan.reina...@coreboot.org>
Reviewed-By: Stefan Reinauer <stefan.reina...@coreboot.org> at Tue Nov 27
23:50:23 2012, giving +2
See http://review.coreboot.org/1618 for details.
-gerrit
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
