Aladyshev Konstantin (ko...@list.ru) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2047
-gerrit commit 632c53afafa444a97a3b533d2b85325f6cdd9c4a Author: Aladyshev Konstantin <aladys...@nicevt.ru> Date: Tue Dec 18 23:15:55 2012 +0400 Supermicro H8QGI: fix routing in acpi table H8QGI board have 2 IO-APICS with 56 irq's: IOAPIC[0]: GSI 0-23 - SB700 southbridge IOAPIC[1]: GSI 24-55 - RD890 northbridge "gDefaultApicDeviceInfoTable[]" structure in northbridge code vendorcode/amd/cimx/rd890/nbIoApic.c have IO APIC interrupt mapping for HT and IOMMU to last 31 irq pin (24+31=55) Also the same value (55) can be found in original supermicro BIOS ACPI DSDT table. Change-Id: Ie26da1f773716d1b7f5f5f884050ae799afc0b7e Signed-off-by: Aladyshev Konstantin <aladys...@nicevt.ru> --- src/mainboard/supermicro/h8qgi/acpi/routing.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/supermicro/h8qgi/acpi/routing.asl b/src/mainboard/supermicro/h8qgi/acpi/routing.asl index 8bc06f6..fb89968 100644 --- a/src/mainboard/supermicro/h8qgi/acpi/routing.asl +++ b/src/mainboard/supermicro/h8qgi/acpi/routing.asl @@ -89,7 +89,7 @@ Scope(\_SB) { Name(APR0, Package(){ /* NB devices in APIC mode */ /* Bus 0, Dev 0 - SR5650 HT */ - Package() { 0xFFFF, Zero, Zero, 16 }, + Package() { 0xFFFF, Zero, Zero, 55 }, /* Bus 0, Dev 1 - CLKCONFIG */ -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot