Jens Rottmann (jrottm...@lippertembedded.de) just uploaded a new patch set to
gerrit, which you can find at http://review.coreboot.org/2445
-gerrit
commit bc476f23e28b69a177186995ab00cc0c48403835
Author: Jens Rottmann <jrottm...@lippertembedded.de>
Date: Mon Feb 18 18:56:48 2013 +0100
Inagua+children: fix simple copy & paste error in code to reset PCIe slots
Looking at AssertSlotReset, the comments and all other 'case's it's
obvious this is a simple copy&paste error where someone just forgot
to change one occurrance of the GPIO nr. Also the AMD Inagua
schematics show that GPIO02 is what they really meant.
Also forwarded the fix to boards copied from Inagua (AMD South
Station, Union Station, Asrock E250M1).
Change-Id: I6b9a3d473245fa27604b2f148a730290277a88ed
Signed-off-by: Jens Rottmann <jrottm...@lippertembedded.de>
---
src/mainboard/amd/inagua/BiosCallOuts.c | 2 +-
src/mainboard/amd/south_station/BiosCallOuts.c | 2 +-
src/mainboard/amd/union_station/BiosCallOuts.c | 2 +-
src/mainboard/asrock/e350m1/BiosCallOuts.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c
b/src/mainboard/amd/inagua/BiosCallOuts.c
index 3c38239..88bb1be 100644
--- a/src/mainboard/amd/inagua/BiosCallOuts.c
+++ b/src/mainboard/amd/inagua/BiosCallOuts.c
@@ -594,7 +594,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32
Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS;
break;
case DeassertSlotReset:
- Data8 =
Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
+ Data8 =
Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ;
Write64Mem8
(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/south_station/BiosCallOuts.c
b/src/mainboard/amd/south_station/BiosCallOuts.c
index 3cfd741..0fc7bee 100644
--- a/src/mainboard/amd/south_station/BiosCallOuts.c
+++ b/src/mainboard/amd/south_station/BiosCallOuts.c
@@ -602,7 +602,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32
Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS;
break;
case DeassertSlotReset:
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0,
GPIO02
Status = AGESA_SUCCESS;
diff --git a/src/mainboard/amd/union_station/BiosCallOuts.c
b/src/mainboard/amd/union_station/BiosCallOuts.c
index 3cfd741..0fc7bee 100644
--- a/src/mainboard/amd/union_station/BiosCallOuts.c
+++ b/src/mainboard/amd/union_station/BiosCallOuts.c
@@ -602,7 +602,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32
Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS;
break;
case DeassertSlotReset:
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0,
GPIO02
Status = AGESA_SUCCESS;
diff --git a/src/mainboard/asrock/e350m1/BiosCallOuts.c
b/src/mainboard/asrock/e350m1/BiosCallOuts.c
index 2d6c9e0..8aa4398 100644
--- a/src/mainboard/asrock/e350m1/BiosCallOuts.c
+++ b/src/mainboard/asrock/e350m1/BiosCallOuts.c
@@ -592,7 +592,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32
Data, VOID *ConfigPtr)
Status = AGESA_SUCCESS;
break;
case DeassertSlotReset:
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
+ Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
Data8 |= BIT6 ;
Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0,
GPIO02
Status = AGESA_SUCCESS;
--
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot
