the following patch was just integrated into master:
commit 76c3700f02f79b49fec30d6ef18d336f122cbf50
Author: Aaron Durbin <adur...@chromium.org>
Date: Tue Oct 30 09:03:43 2012 -0500
haswell: Add initial support for Haswell platforms
The Haswell parts use a PCH code named Lynx Point (Series 8). Therefore,
the southbridge support is included as well. The basis for this code is
the Sandybridge code. Management Engine, IRQ routing, and ACPI still
requires
more attention, but this is a good starting point.
This code partially gets up through the romstage just before training
memory on a Haswell reference board.
Change-Id: If572d6c21ca051b486b82a924ca0ffe05c4d0ad4
Signed-off-by: Aaron Durbin <adur...@chromium.org>
Reviewed-on: http://review.coreboot.org/2616
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminn...@gmail.com>
Build-Tested: build bot (Jenkins) at Mon Mar 11 23:53:50 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminn...@gmail.com> at Thu Mar 14 01:44:40
2013, giving +2
See http://review.coreboot.org/2616 for details.
-gerrit
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