I'm just going to summarize our current situation: 1. HEAD does not work at all using the 3rdparty/northbridge/intel/sandybridge/systemagent-r6.bin 2. Reverting 1cc3416f5fb58883fdad7192856c258c01909fd7 and using systemagent-sandybridge.bin boots, but it does not handle the soldered-on memory.
Does that sound about right? On Mon, Jul 29, 2013 at 1:12 PM, John Lewis <[email protected]> wrote: > > On 29/07/2013 16:47, Aaron Durbin wrote: > >> On Mon, Jul 29, 2013 at 10:38 AM, John Lewis <[email protected]> wrote: >> >>> My 550 won't boot without the DIMM in, so it sounds like it's not >>> recognising the embedded memory. >> >> >> OK. That is a good data point. However, I don't know from what code >> base that original wrapper was built from in order to debug further. >> Did you save the original rom image that your device was shipped with? >> I'd be curious to know if that matches the one found in the blobs >> repo. > > > You can find it at http://johnlewis.ie/bios.bin and the mrc.bin's are > different by a few kilobytes. I can also tell you that if I try to use that > mrc.bin with straight Coreboot I get a nice brick. ;) > >> >>> On 29/07/2013 16:25, Aaron Durbin wrote: >>> >>>> On Mon, Jul 29, 2013 at 10:22 AM, Kyösti Mälkki >>>> <[email protected] [1]> wrote: >>>> >>>>> Did someone change the SPD eeprom address notation in pei_data from >>>>> 7-bit to 8-bit addresses? samsung/lumpy/romstage.c : .spd_addresses >>>>> = { 0x50, 0x00,0xf0,0x00 }, google/stout/romstage.c : >>>>> spd_addresses: { 0xA0, 0x00,0xA4,0x00 }, >>>> >>>> The 0xf0 handles the soldered down memory. I was looking at the 0x50 >>>> address as well, but I think that is correct (I'm looking at code >>>> that I think is the wrapper that you guys are using). I could be >>>> wrong though. > > > > -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
