On 31/07/2013 16:20, Aaron Durbin wrote:
On Wed, Jul 31, 2013 at 10:18 AM, Aaron Durbin <[email protected]>
wrote:
On Wed, Jul 31, 2013 at 10:00 AM, John Lewis <[email protected]
[4]>
wrote:
On 31/07/2013 15:33, Aaron Durbin wrote:
On Wed, Jul 31, 2013 at 9:24 AM, John Lewis <[email protected]
[3]> wrote:
Hi all, Just want to confirm where we are in terms of things
working or not. The new system-agent binary works and recognises
all 4 GB of RAM as long as an additional pei data field is added
to Stefan's patches in http://review.coreboot.org/#/c/3831/ [1]
[1] as detailed by Kyösti in the comments. The patches in
http://review.coreboot.org/#/c/3830/ [2] [2] don't appear to do
anything for mrc.cache (it's still zero size) and this (or
perhaps something else) results in a time to SeaBIOS prompt of
between 5 to 9 seconds.
Can you show us 'ls -l $(obj)/mrc.cache' ? I didn't see
-rw-rw-r--. 1 john john 0 Jul 31 11:04 mrc.cache
This is your problem. I was hoping for a build.log that was
completely
clean. The build log attached does not show mrc.cache being created.
Can you try the following and rebuilt? dd if=/dev/zero of=mrc.cache
bs=16K count=1 | tr '00' '377' > mrc.cache
Apologies. I am doing too many things at once. Remove the
'of=mrc.cache' parameter to dd.
The good news is that cbfstool now reports a non-zero mrc.cache, the
bad news is it doesn't make any difference. cbmem -c reports
Updating MRC cache data.
No FMAP found at ffe70000.
FMAP: area RW_MRC_CACHE not found
find_current_mrc_cache_local: No valid MRC cache found.
SF: Detected W25Q64 with page size 1000, total 800000
Need to erase the MRC cache region of -1 bytes at 0011037f
SF: Erase offset/length not multiple of erase size
Finally: write MRC cache update to flash at 0011037f
ICH SPI: Data transaction error
SF: Failed to send write command (1 bytes): -1
SF: Winbond Page Program failed
CONFIG_MRC_CACHE_SIZE in your .config. Also, what does 'cbfstool
Menuconfig doesn't allow you specify it, and there isn't currently
a
default being put in automatically.
image.rom print' say now? Build logs with V=1 would be helpful to
see
coreboot.rom: 8192 kB, bootblocksize 1552, romsize 8388608, offset
0x700000 alignment: 64 bytes Name Offset Type Size cmos_layout.bin
0x700000 cmos_layout 1120 pci8086,0106.rom 0x7004c0 optionrom 65536
cpu_microcode_blob.bin 0x710500 microcode 20544 fallback/romstage
0x7155c0 stage 36438 fallback/coreboot_ram 0x71e480 stage 294016
fallback/payload 0x766140 payload 87816 (empty) 0x77b880 null 18200
mrc.cache 0x77ffc0 (unknown) 0 (empty) 0x780000 null 130968 mrc.bin
0x79ffc0 (unknown) 195732 (empty) 0x7cfcc0 null 49880 spd.bin
0x7dbfc0 (unknown) 1536 (empty) 0x7dc600 null 144280
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