On Tue, Feb 18, 2014 at 10:11 AM, Peter Stuge <[email protected]> wrote: > Aaron Durbin wrote: >> > I think the most obvious thing is the message port architecture? >> > >> > Sure, we can skip modeling them and create some global functions for >> > sending messages to random ports, but that wouldn't be very impressive.. >> >> What do you mean by modeling them? > > Compare with how HT (doesn't) works, or with PCI.
In what way? Something that is probe-able? And something that isn't? > > >> What is an impressive implementation for sending messages to ports? >> It's just another address space through index/data pairs. > > That's exactly what I disagree with. There is an architecture and I > would expect coreboot to model it rather than dumping an array of > magic number pairs into index/data. > > The coreboot devicetree doesn't model HT so well - it is treated as > "another address space". I think it would be better to avoid > repeating such a mistake? What is it that you are suggesting/wanting devicetree to do what in this case? I am failing to understand the mistake you are referring to. Could you please provide explicit examples having c struct fields represented in devicetree that model another address space? -Aaron -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
