Thanks Peter once again for helpful information. I was reading code line by line and going through i945 Express chipset document, tried to understand register settings and values. Seems to be tough job writing RAM init, and wouldn't have been possible without any documentation. Don't understand why Intel has made DRAM controller setup/Ram-init documentation NDA, and have made chipset documentation public ********************************************************************************************** Important Note This email (including any attachments) contains information which is confidential and may be subject to legal privilege. If you are not the intended recipient you must not use, distribute or copy this email. If you have received this email in error please notify the sender immediately and delete this email. Any views expressed in this email are not necessarily the views of IRESS Limited.
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