I'm still no further along. On the very first boot after flash I get:

coreboot-5cbe3a8-dirty romstage Thu Sep  3 10:28:23 BST 2015 starting...

PM1_STS:   0010
PM1_EN:    0000
PM1_CNT:   00000000
TCO_STS:   0000 0000
GPE0_STS:  1ef86df0 187d4fdf 0005f240 00010000
GPE0_EN:   00000000 00000000 00000000 00000000
GEN_PMCON: 0200 20a0 1a09
Previous Sleep State: S0
CPU: Intel(R) Core(TM) i3-5005U CPU @ 2.00GHz
CPU: ID 306d4, Broadwell E0 or F0, ucode: 0000001d
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 1604 (rev 09) is Broadwell F0
PCH: device id 9cc5 (rev 03) is Broadwell U Base
IGD: device id 1616 (rev 09) is Broadwell U GT2
CPU: frequency set to 2000 MHz
POST: 0x32
SPD: index 1 (GPIO47=0 GPIO9=0 GPIO13=1)
SPD: module type is DDR3
SPD: module part is HMT425S6AFR6A-PB
SPD: banks 8, ranks 1, rows 15, columns 10, density 4096 Mb
SPD: device width 16 bits, bus width 64 bits
SPD: module size is 2048 MB (per channel)
POST: 0x32
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : NO
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : Bring up
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : BUP Phase
ME: Power Management Event  : Pseudo-global reset
ME: Progress Phase State    : Waiting for DID BIOS message
ME: HSIO Version            : 8705 (CRC 0xfbc2)
No MRC cache found.
Rebooting with EC in RO mode:
POST: 0x00

Reverting to the previous log on subsequent boots. Note I have also built the ROM inside the CrOS SDK.

What should I do now?

See attached changes + config.

-John.
diff --git a/Makefile.inc b/Makefile.inc
index 2b4d33e..47b1556 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -464,11 +464,11 @@ $(obj)/coreboot.pre1: $(CBFSTOOL)
 	mv $(obj)/coreboot.rom $@
 endif
 
-ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
-REFCODE_BLOB=$(obj)/refcode.rmod
-$(REFCODE_BLOB): $(RMODTOOL)
-	$(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@
-endif
+# ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
+# REFCODE_BLOB=$(obj)/refcode.rmod
+# $(REFCODE_BLOB): $(RMODTOOL)
+# 	$(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@
+# endif
 
 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB)
 	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
@@ -504,7 +504,7 @@ ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y)
 	$(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG)
 endif
 ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
-	$(CBFSTOOL) $@.tmp add-stage -f $(REFCODE_BLOB) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG)
+	$(CBFSTOOL) $@.tmp add -f $(CONFIG_REFCODE_BLOB_FILE) -n $(CONFIG_CBFS_PREFIX)/refcode -t raw
 endif
 ifeq ($(CONFIG_PXE_ROM),y)
 	$(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 0ef12fb..1e058a7 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -161,6 +161,7 @@ void google_chromeec_check_ec_image(int expected_type)
 	}
 }
 
+#if CONFIG_CHROMEOS
 /* Check for recovery mode and ensure EC is in RO */
 void google_chromeec_early_init(void)
 {
@@ -169,6 +170,7 @@ void google_chromeec_early_init(void)
 		google_chromeec_check_ec_image(EC_IMAGE_RO);
 	}
 }
+#endif
 
 void google_chromeec_check_pd_image(int expected_type)
 {
@@ -200,6 +202,7 @@ void google_chromeec_check_pd_image(int expected_type)
 	}
 }
 
+#if CONFIG_CHROMEOS
 /* Check for recovery mode and ensure PD is in RO */
 void google_chromeec_early_pd_init(void)
 {
@@ -210,6 +213,8 @@ void google_chromeec_early_pd_init(void)
 }
 #endif
 
+#endif
+
 u16 google_chromeec_get_board_version(void)
 {
 	struct chromeec_command cmd;
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 89c057f..8518ccf 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -130,7 +130,7 @@ $(obj)/lib/uart8250.smm.o : $(OPTION_TABLE_H)
 ifeq ($(CONFIG_RELOCATABLE_MODULES),y)
 ramstage-y += rmodule.c
 # Include rmodule.c in romstage if vboot verification is selected.
-romstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += rmodule.c
+romstage-y += rmodule.c
 
 RMODULE_LDSCRIPT := $(src)/lib/rmodule.ld
 
diff --git a/src/mainboard/google/auron_yuna/Kconfig b/src/mainboard/google/auron_yuna/Kconfig
index 2db9689..1e56e0f 100644
--- a/src/mainboard/google/auron_yuna/Kconfig
+++ b/src/mainboard/google/auron_yuna/Kconfig
@@ -12,8 +12,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_ACPI_RESUME
 	select MMCONF_SUPPORT
 	select HAVE_SMI_HANDLER
-	select CHROMEOS
-	select CHROMEOS_VBNV_CMOS
 	select EXTERNAL_MRC_BLOB
 	select CACHE_ROM
 	select MARK_GRAPHICS_MEM_WRCOMB
diff --git a/src/mainboard/google/auron_yuna/romstage.c b/src/mainboard/google/auron_yuna/romstage.c
index 705b0af..c1a3916 100644
--- a/src/mainboard/google/auron_yuna/romstage.c
+++ b/src/mainboard/google/auron_yuna/romstage.c
@@ -35,8 +35,10 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 
 	post_code(0x32);
 
+	#if CONFIG_CHROMEOS
 	/* Ensure the EC is in the right mode for recovery */
 	google_chromeec_early_init();
+	#endif
 
 	/* Initialize GPIOs */
 	init_gpios(mainboard_gpio_config);
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 0b58492..95f662f 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -80,11 +80,11 @@ INTERMEDIATE := pch_add_me
 
 pch_add_me: $(obj)/coreboot.pre $(IFDTOOL)
 	printf "    DD         Adding Intel Firmware Descriptor\n"
-	dd if=3rdparty/mainboard/$(MAINBOARDDIR)/descriptor.bin \
+	dd if=descriptor.bin \
 		of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
 	printf "    IFDTOOL    me.bin -> coreboot.pre\n"
 	$(objutil)/ifdtool/ifdtool \
-		-i ME:3rdparty/mainboard/$(MAINBOARDDIR)/me.bin \
+		-i ME:me.bin \
 		$(obj)/coreboot.pre
 	mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
 ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y)
diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index 77be48a..19ca1d5 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -529,6 +529,7 @@ static void igd_init(struct device *dev)
 		reg_script_run_on_dev(dev, haswell_late_init_script);
 	}
 
+	#if CONFIG_CHROMEOS
 	if (oprom_is_loaded) {
 		/*
 		 * Work around VBIOS issue that is not clearing first 64
@@ -549,6 +550,7 @@ static void igd_init(struct device *dev)
 		gtt_write(DDI_BUF_CTL_A, DDI_BUF_IS_IDLE | DDI_A_4_LANES |
 			  DDI_INIT_DISPLAY_DETECTED);
 	}
+	#endif
 }
 
 static void igd_read_resources(struct device *dev)
diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index e1481f6..eb23b54 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -25,7 +25,7 @@
 #include <rmodule.h>
 #include <ramstage_cache.h>
 #include <string.h>
-#include <vendorcode/google/chromeos/vboot_handoff.h>
+// #include <vendorcode/google/chromeos/vboot_handoff.h>
 #include <broadwell/pei_data.h>
 #include <broadwell/pei_wrapper.h>
 #include <broadwell/ramstage.h>
@@ -104,17 +104,17 @@ static void cache_refcode(const struct rmod_stage_load *rsl)
 	memcpy(&c->program[0], (void *)c->load_address, c->size);
 }
 
-static int load_refcode_from_vboot(struct rmod_stage_load *refcode,
-				    struct cbfs_stage *stage)
-{
-	printk(BIOS_DEBUG, "refcode loading from vboot rw area.\n");
+// static int load_refcode_from_vboot(struct rmod_stage_load *refcode,
+//				    struct cbfs_stage *stage)
+//{
+//	printk(BIOS_DEBUG, "refcode loading from vboot rw area.\n");
 
-	if (rmodule_stage_load(refcode, stage) || refcode->entry == NULL) {
-		printk(BIOS_DEBUG, "Error loading reference code.\n");
-		return -1;
-	}
-	return 0;
-}
+//	if (rmodule_stage_load(refcode, stage) || refcode->entry == NULL) {
+//		printk(BIOS_DEBUG, "Error loading reference code.\n");
+//		return -1;
+//	}
+//	return 0;
+//}
 
 static int load_refcode_from_cbfs(struct rmod_stage_load *refcode)
 {
@@ -130,8 +130,8 @@ static int load_refcode_from_cbfs(struct rmod_stage_load *refcode)
 
 static pei_wrapper_entry_t load_reference_code(void)
 {
-	struct vboot_handoff *vboot_handoff;
-	const struct firmware_component *fwc;
+//	struct vboot_handoff *vboot_handoff;
+//	const struct firmware_component *fwc;
 	struct rmod_stage_load refcode = {
 		.cbmem_id = CBMEM_ID_REFCODE,
 		.name = CONFIG_CBFS_PREFIX "/refcode",
@@ -142,23 +142,23 @@ static pei_wrapper_entry_t load_reference_code(void)
 		return load_refcode_from_cache();
 	}
 
-	vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF);
-	fwc = &vboot_handoff->components[CONFIG_VBOOT_REFCODE_INDEX];
+//	vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF);
+//	fwc = &vboot_handoff->components[CONFIG_VBOOT_REFCODE_INDEX];
 
-	if (vboot_handoff == NULL ||
-	    vboot_handoff->selected_firmware == VB_SELECT_FIRMWARE_READONLY ||
-	    CONFIG_VBOOT_REFCODE_INDEX >= MAX_PARSED_FW_COMPONENTS ||
-	    fwc->size == 0 || fwc->address == 0) {
-		ret = load_refcode_from_cbfs(&refcode);
-	} else {
-		ret = load_refcode_from_vboot(&refcode, (void *)fwc->address);
+//	if (vboot_handoff == NULL ||
+//	    vboot_handoff->selected_firmware == VB_SELECT_FIRMWARE_READONLY ||
+//	    CONFIG_VBOOT_REFCODE_INDEX >= MAX_PARSED_FW_COMPONENTS ||
+//	    fwc->size == 0 || fwc->address == 0) {
+//		ret = load_refcode_from_cbfs(&refcode);
+//	} else {
+//		ret = load_refcode_from_vboot(&refcode, (void *)fwc->address);
 
-		if (ret < 0)
+//		if (ret < 0)
 			ret = load_refcode_from_cbfs(&refcode);
-	}
+//	}
 
-	if (ret < 0)
-		return NULL;
+//	if (ret < 0)
+//		return NULL;
 
 	/* Cache loaded reference code. */
 	cache_refcode(&refcode);
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 1682f32..40244e3 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -170,6 +170,7 @@ int vboot_get_sw_write_protect(void)
 	/* Return unprotected status if status read fails. */
 	return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
 }
+#endif
 
 void __attribute__((weak)) mainboard_pre_console_init(void) {}
-#endif
+
#
# Automatically generated make config: don't edit
# coreboot version: 5cbe3a8-dirty
# Wed Sep  2 20:33:17 2015
#

#
# General setup
#
# CONFIG_EXPERT is not set
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_ALT_CBFS_LOAD_PAYLOAD=y
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_SCANBUILD_ENABLE is not set
# CONFIG_CCACHE is not set
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
# CONFIG_EARLY_CBMEM_INIT is not set
CONFIG_DYNAMIC_CBMEM=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_USE_BLOBS is not set
# CONFIG_COVERAGE is not set

#
# Mainboard
#
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_ADVANTECH is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_ARIMA is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASI is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AXUS is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIFFEROS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_EAGLELION is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
CONFIG_VENDOR_GOOGLE=y
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NEWISYS is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_TECHNOLOGIC is not set
# CONFIG_VENDOR_TELEVIDEO is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="google/auron_yuna"
CONFIG_MAINBOARD_PART_NUMBER="Auron_Yuna"
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_MAINBOARD_VENDOR="GOOGLE"
CONFIG_MAX_CPUS=8
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_RAMBASE=0x100000
CONFIG_VGA_BIOS_ID="8086,1616"
CONFIG_STACK_SIZE=0x1000
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_VGA_BIOS=y
CONFIG_CONSOLE_POST=y
# CONFIG_UDELAY_IO is not set
CONFIG_DCACHE_RAM_BASE=0xff7c0000
CONFIG_DCACHE_RAM_SIZE=0x10000
CONFIG_SERIAL_CPU_INIT=y
CONFIG_ACPI_SSDTX_NUM=0
CONFIG_VGA_BIOS_FILE="pci8086,0406.rom"
# CONFIG_PCI_64BIT_PREF_MEM is not set
CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_XIP_ROM_SIZE=0x10000
# CONFIG_GFXUMA is not set
CONFIG_VENDOR_SPECIFIC_OPTIONS=y
# CONFIG_BOARD_GOOGLE_AURON is not set
# CONFIG_BOARD_GOOGLE_AURON_PAINE is not set
CONFIG_BOARD_GOOGLE_AURON_YUNA=y
# CONFIG_BOARD_GOOGLE_BELTINO is not set
# CONFIG_BOARD_GOOGLE_BOLT is not set
# CONFIG_BOARD_GOOGLE_BUTTERFLY is not set
# CONFIG_BOARD_GOOGLE_DAISY is not set
# CONFIG_BOARD_GOOGLE_FALCO is not set
# CONFIG_BOARD_GOOGLE_LINK is not set
# CONFIG_BOARD_GOOGLE_NYAN is not set
# CONFIG_BOARD_GOOGLE_NYAN_BIG is not set
# CONFIG_BOARD_GOOGLE_NYAN_BLAZE is not set
# CONFIG_BOARD_GOOGLE_PANTHER is not set
# CONFIG_BOARD_GOOGLE_PARROT is not set
# CONFIG_BOARD_GOOGLE_PEACH_PIT is not set
# CONFIG_BOARD_GOOGLE_PEPPY is not set
# CONFIG_BOARD_GOOGLE_RAMBI is not set
# CONFIG_BOARD_GOOGLE_RUSH is not set
# CONFIG_BOARD_GOOGLE_RUSH_RYU is not set
# CONFIG_BOARD_GOOGLE_SAMUS is not set
# CONFIG_BOARD_GOOGLE_SLIPPY is not set
# CONFIG_BOARD_GOOGLE_STORM is not set
# CONFIG_BOARD_GOOGLE_STOUT is not set
# CONFIG_BOARD_GOOGLE_URARA is not set
# CONFIG_BOARD_GOOGLE_VEYRON_PINKY is not set
CONFIG_VBOOT_RAMSTAGE_INDEX=0x2
CONFIG_VBOOT_REFCODE_INDEX=0x3
CONFIG_MAINBOARD_FAMILY="Google_Auron"
CONFIG_BOOT_MEDIA_SPI_BUS=0
CONFIG_MMCONF_SUPPORT_DEFAULT=y
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
CONFIG_LOGICAL_CPUS=y
CONFIG_IOAPIC=y
CONFIG_SMP=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
CONFIG_USBDEBUG=y
# CONFIG_K8_REV_F_SUPPORT is not set
CONFIG_CPU_ADDR_BITS=36
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
CONFIG_COREBOOT_ROMSIZE_KB=8192
CONFIG_ROM_SIZE=0x800000
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_MAINBOARD_ENCLOSURE_TYPE=0x3
CONFIG_ARCH_X86=y
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_MIPS is not set

#
# Architecture (x86)
#
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_MARK_GRAPHICS_MEM_WRCOMB=y
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
CONFIG_X86_BOOTBLOCK_SIMPLE=y
# CONFIG_X86_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_ROMCC is not set
CONFIG_PC80_SYSTEM=y
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="soc/intel/broadwell/bootblock/systemagent.c"
# CONFIG_HAVE_CMOS_DEFAULT is not set
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="soc/intel/broadwell/bootblock/pch.c"
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_ID_SECTION_OFFSET=0x80

#
# Architecture (arm)
#
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM_V4 is not set
# CONFIG_ARCH_ROMSTAGE_ARM_V4 is not set
# CONFIG_ARCH_RAMSTAGE_ARM_V4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM_V7 is not set
# CONFIG_ARCH_VERSTAGE_ARM_V7 is not set
# CONFIG_ARCH_ROMSTAGE_ARM_V7 is not set
# CONFIG_ARCH_RAMSTAGE_ARM_V7 is not set
# CONFIG_ARM_BOOTBLOCK_CUSTOM is not set
CONFIG_ARM_BOOTBLOCK_SIMPLE=y
# CONFIG_ARM_BOOTBLOCK_NORMAL is not set
# CONFIG_CPU_HAS_BOOTBLOCK_INIT is not set
# CONFIG_MAINBOARD_HAS_BOOTBLOCK_INIT is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_USE_SECURE_MONITOR is not set
# CONFIG_ARCH_BOOTBLOCK_ARM_V8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM_V8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM_V8_64 is not set

#
# Architecture (mips)
#
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set

#
# Chipset
#

#
# CPU
#
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_BOOTBLOCK_CPU_INIT="soc/intel/broadwell/bootblock/cpu.c"
# CONFIG_CPU_ARMLTD_ARMV8 is not set
CONFIG_CPU_SPECIFIC_OPTIONS=y
# CONFIG_CPU_AMD_AGESA is not set
CONFIG_HIGH_SCRATCH_MEMORY_SIZE=0x0
CONFIG_SMM_TSEG_SIZE=0
CONFIG_MICROCODE_INCLUDE_PATH="src/soc/intel/broadwell/microcode"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_SMM_RESERVED_SIZE=0x100000
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
CONFIG_MONOTONIC_TIMER_MSR=y
CONFIG_SSE2=y
CONFIG_CACHE_MRC_BIN=y
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_CONSTANT_RATE=y
# CONFIG_TSC_MONOTONIC_TIMER is not set
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_CALIBRATE_WITH_IO is not set
# CONFIG_TSC_SYNC_LFENCE is not set
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_CACHE_ROM=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULES=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
# CONFIG_X86_AMD_FIXED_MTRRS is not set
CONFIG_PARALLEL_MP=y
CONFIG_BACKUP_DEFAULT_SMM_REGION=y
CONFIG_CACHE_AS_RAM=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_CPU_MICROCODE_IN_CBFS=y
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
CONFIG_CAR_MIGRATION=y

#
# Northbridge
#
CONFIG_VIDEO_MB=0
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
CONFIG_CBFS_SIZE=0x100000
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
CONFIG_CACHE_MRC_SIZE_KB=512
CONFIG_EXTERNAL_MRC_BLOB=y
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="mrc.bin"
CONFIG_DCACHE_RAM_ROMSTAGE_STACK_SIZE=0x2000
CONFIG_PRE_GRAPHICS_DELAY=0

#
# Southbridge
#
CONFIG_EHCI_BAR=0xd8000000
CONFIG_EHCI_DEBUG_OFFSET=0xa0
CONFIG_USBDEBUG_DEFAULT_PORT=1
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SPI_FLASH=y
CONFIG_SERIRQ_CONTINUOUS_MODE=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set

#
# Super I/O
#

#
# Embedded Controllers
#
CONFIG_EC_GOOGLE_CHROMEEC=y
# CONFIG_EC_GOOGLE_CHROMEEC_I2C is not set
CONFIG_EC_GOOGLE_CHROMEEC_LPC=y
# CONFIG_EC_GOOGLE_CHROMEEC_SPI is not set

#
# SoC
#
CONFIG_MRC_BIN_ADDRESS=0xfffa0000
CONFIG_SOC_INTEL_BROADWELL=y
CONFIG_CACHE_MRC_SETTINGS=y
# CONFIG_INTEL_PCH_UART_CONSOLE is not set
CONFIG_MRC_SETTINGS_CACHE_BASE=0xffb00000
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA132 is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set

#
# Devices
#
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
CONFIG_ALWAYS_LOAD_OPROM=y
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
CONFIG_PCI=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_AGP_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCI_BUS_SEGN_BITS=0

#
# VGA BIOS
#

#
# PXE ROM
#
# CONFIG_PXE_ROM is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set

#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_ELOG is not set
# CONFIG_GIC is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_I2C_TPM is not set
# CONFIG_INTEL_DP is not set
# CONFIG_INTEL_DDI is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVERS_OXFORD_OXPCIE is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_LPC_TPM is not set
CONFIG_DRIVERS_MC146818_RTC=y
CONFIG_DRIVERS_MC146818_CMOS=y
CONFIG_DRIVERS_RTC_HAS_ALTCENTURY=y
# CONFIG_RTL8168_ROM_DISABLE is not set
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_SPI_ATOMIC_SEQUENCING=y
CONFIG_SPI_FLASH_MEMORY_MAPPED=y
CONFIG_SPI_FLASH_SMM=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_GIGADEVICE=y
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_TPM is not set
CONFIG_MMCONF_SUPPORT=y

#
# Console
#
CONFIG_EARLY_CONSOLE=y
# CONFIG_CONSOLE_SERIAL is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_FIXED_PRERAM_CBMEM_BUFFER is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x10000
CONFIG_CONSOLE_PRERAM_BUFFER_SIZE=0xc00
CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_8=y
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_MAXIMUM_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_NO_POST is not set
# CONFIG_CMOS_POST is not set
# CONFIG_IO_POST is not set
CONFIG_HAVE_UART_IO_MAPPED=y
# CONFIG_HAVE_UART_MEMORY_MAPPED is not set
# CONFIG_HAVE_UART_SPECIAL is not set
CONFIG_HAVE_ACPI_RESUME=y
# CONFIG_HAVE_ACPI_SLIC is not set
CONFIG_HAVE_HARD_RESET=y
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_TIMER_QUEUE is not set
CONFIG_HAVE_OPTION_TABLE=y
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_CACHE_ROM_SIZE=0x100000
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_VGA is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_RELOCATABLE_RAMSTAGE=y
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
CONFIG_HAVE_REFCODE_BLOB=y
CONFIG_REFCODE_BLOB_FILE="refcode.elf"
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_MAX_PIRQ_LINKS=4

#
# System tables
#
# CONFIG_MULTIBOOT is not set
CONFIG_GENERATE_ACPI_TABLES=y
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y

#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
CONFIG_PAYLOAD_SEABIOS=y
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_TIANOCORE is not set
# CONFIG_SEABIOS_STABLE is not set
CONFIG_SEABIOS_MASTER=y
CONFIG_PAYLOAD_FILE="$(obj)/seabios/out/bios.bin.elf"
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
# CONFIG_COMPRESSED_PAYLOAD_NRV2B is not set

#
# Debugging
#
# CONFIG_GDB_STUB is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
# CONFIG_HAVE_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_SMM_RELOCATION is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_LLSHELL is not set
# CONFIG_TRACE is not set
# CONFIG_BOARD_ID_SUPPORT is not set
# CONFIG_RAMINIT_SYSINFO is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
CONFIG_REG_SCRIPT=y
# CONFIG_CHROMEOS is not set
CONFIG_CHROMEOS_RAMOOPS_DYNAMIC=y
CONFIG_EC_SOFTWARE_SYNC=y
CONFIG_VIRTUAL_DEV_SWITCH=y
CONFIG_MAX_REBOOT_CNT=3
-- 
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