Hi Ben, I haven't got this recent workaround. I will make a try by back porting this code that seems to be the problem.
I will inform you about my results. Many thanks Benoit On 11/02/2016 00:42, Ben Gardner wrote: > Hi Benoit, > > There was a bit of a discussion about interrupt routing a while back > (Dec 2015) on FSP Baytrail. > Apparently the IRQs were not swizzled correctly. > > https://review.coreboot.org/#/c/12684/ > > If you are not using a recent version of coreboot, you may need to > back-port that change. > > Ben > > On Wed, Feb 10, 2016 at 3:00 PM, benoit <benoit.sans...@gmail.com> wrote: >> Hi all, >> >> I am facing a legacy IRQ under OS. >> I am currently using Coreboot + FSP on baytrail. >> My OS is running with IRQ in legacy using PIRQ described in >> coreboot/src/mainboard/intel/bayleybay_fsp/irqroute.h . >> Under the OS USB, SATA, SMBus are working well using legacy interrupt. >> Nevertheless I have an ethernet device connected on the PCIe root #4 and >> no IRQs are received. >> >> I tried to change the IRQ in the interrupt line register without success. >> >> I can compare also with a Phoenix BIOS, and with the same OS binary the >> ethernet is working. >> >> I check out also the ilb registers + 0x4d0 and 0x4d1 registers (ECL). >> Everything is correctly initalized. >> >> Do I need to activate/deactivate something in the PCIe root #4 to >> forward legacy interrupt to the 8259 PIC ? >> >> Many thanks in advance >> Benoit >> >> -- >> coreboot mailing list: coreboot@coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot