On Thu, 12 May 2016, Peter Stuge wrote:
David Griffith wrote:
lenovobios_firstflash and lenovobios_secondflash scripts
Please do not confuse coreboot with libreboot. Instructions for/about
libreboot are specific to that project, and nothing that the coreboot
community can support you with.
I didn't confuse the two. I was just following the first hit I got when
searching for "coreboot thinkpad t60p"
Did I actually succeed in flashing my T60p?
The first flash was successful, as you are clearly using coreboot. :)
It's important that you flash again. Now that you have coreboot just
run flashrom to write the coreboot.rom. Set the BUC.TS bit
appropriately, otherwise your machine will not boot anymore
after NVRAM battery outage.
I did the flash again and the result after rebooting is a long beep
followed by two short beeps. According to what I find with Google, the
laptop is bricked and I need to open it up to get at the boot flash chip
and flash it with a bus pirate.
I wrote pretty clear step-by-step instructions for all this for the
X60 quite some time ago. I hope they are still available somewhere.
Did the instructions resemble this?
https://www.coreboot.org/Board:lenovo/x60/Installation
Did I do anything wrong?
Not really, only that you used instructions and tools that apply to
libreboot and expected them to also suit coreboot.
How do I fix the trackpoint
AFAIK this is resolved by adding a delay to SeaBIOS. The coreboot build
system used to do so automatically, but maybe that has been broken, or
maybe it never was there for the T60.
Where is/was this delay?
and get rid of the whine?
Noone knows. What is known is that it is related to switching between
various power saving states and that you can do various things to
work around it.
One is to add idle=halt to the kernel command line. This will
significantly increase power consumption and make the machine run
significantly hotter. Another is to restrict which C-states the CPU
can enter. Same drawbacks. Another is to blacklist uhci_hcd which
causes constant wakeups, every ms, drawback you can not plug low-
and full speed USB devices directly into the mainboard, but only via
a high speed hub with TT. You'll still hear odd noise without
uhci_hcd but not constantly like now.
Please research this problem and provide the project with a proper fix.
It might involve researching undocumented power saving properties of
the 945 platform. Thank you.
I'll see what I can do. In
https://www.coreboot.org/pipermail/coreboot/2014-June/078099.html you
suggested clever use of an oscilloscope. Precisely where and how would
you suggest probing?
Has anyone given thought to including OpenBIOS as an option in the Payload
menu of menuconfig?
--
David Griffith
d...@661.org
--
coreboot mailing list: coreboot@coreboot.org
https://www.coreboot.org/mailman/listinfo/coreboot
