Hi all, When I try coreboot on Bayley Bay platform along with fsp (BAYTRAIL_FSP_GOLD_004_22-MAY-2015), it is getting hang at post code 19.
Also I tried with debug version fsp (BAYTRAIL_FSP_GOLD_004_22-MAY-2015_DEBUG) , it still at that point and below is the debug log. Firmware Image: Have used the 8 MB vendor bios and flashed the last 2 MB region(600000 to 7fffff) with coreboot image. >From the debug log: coreboot gives the control to FSP binary >routine(FspInitApi) and it is getting hang when trying to do PCH >initialize(PchMiscInit) inside FSP part code. POST 19 code info: EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CLOCK_PEI_INIT_ENTRY ==> Clock Init PEIM Entry I have not seen the clock related setting available when customizing fsp binary using BCT. I tried to disable south cluster component such as EMMC,HSUART,SATA and SIO using BCT , it didn't help me. Can anyone please help me provide some inputs such as related below to proceed further debugging on it ? 1. Any other setting we can try out using BCT 2. About devices configuration to be initialized byPchMiscInit function. 3. Anything need to be cared/double checked from coreboot side in order to giving control to FspInitApi function. 4. Does pch straps settings may cause this since I am using upper 6 MB region flash data which is from vendor bios. 4. Please suggest anything on it. Thanks in advance, Kathappan <<<<<<<<<<<< Debug log Start >>>>>>>>>>>>>>> coreboot-coreboot-unknown Thu May 12 08:04:42 UTC 2016 romstage starting... RTC Init POST: 0x44 POST: 0x47 POST: 0x48 Starting the Intel FSP (early_init) PM1_STS = 0x0 PM1_CNT = 0x0 GEN_PMCON1 = 0x44000 prev_sleep_state = S5 Configure Default UPD Data PcdMrcInitSPDAddr1: 0xa0 (default) PcdMrcInitSPDAddr2: 0xa2 (default) PcdSataMode: 0x01 (set) PcdLpssSioEnablePciMode: 0x01 (default) PcdMrcInitMmioSize: 0x800 (default) PcdIgdDvmt50PreAlloc: 0x02 (default) PcdApertureSize: 0x02 (default) PcdGttSize: 0x02 (default) SerialDebugPortAddress: 0x3f8 (default) SerialDebugPortType: 0x01 (default) PcdMrcDebugMsg: 0x01 (default) PcdSccEnablePciMode: 0x01 (default) IgdRenderStandby: 0x00 (default) TxeUmaEnable: 0x00 (default) PcdOsSelection: 0x04 (default) PcdEMMC45DDR50Enabled: 0x01 (default) PcdEMMC45HS200Enabled: 0x00 (default) PcdEMMC45RetuneTimerValue: 0x08 (default) PcdEnableIgd: 0x01 (default) AutoSelfRefreshEnable: 0x00 (default) APTaskTimeoutCnt: 0x00 (default) GTT Size: 2 MB Tseg Size: 8 MB Aperture Size: 256 MB IGD Memory Size: 64 MB MMIO Size: 2048 MB MIPI/ISP: Disabled Sdio: Enabled Sdcard: Enabled SATA: Enabled SIO Dma 0: Enabled SIO I2C0: Enabled SIO I2C1: Enabled SIO I2C2: Enabled SIO I2C3: Enabled SIO I2C4: Enabled SIO I2C5: Enabled SIO I2C6: Enabled Azalia: Enabled SIO Dma1: Enabled Pwm0: Enabled Pwm1: Enabled Hsuart0: Enabled Hsuart1: Enabled Spi: Enabled Lpe: Disabled eMMC Mode: eMMC 4.5 SATA Mode: AHCI Xhci: Enabled POST: 0x92 ============= PEIM FSP (VLYVIEW0 0x00000304) ============= Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A The 0th FV start address is 0x000FFFE0400, size is 0x00017C00, handle is 0x0 Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38 Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389 Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480 Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1 Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFFE0FD4 The 1th FV start address is 0x000FFFB0000, size is 0x0002F400, handle is 0xFFFB0000 Install PPI: A55D6970-1306-440C-8C72-8F51FAFB2926 PcdMrcInitTsegSize = 8 PcdMrcInitMmioSize = 800 PcdMrcInitSPDAddr1 = A0 PcdMrcInitSPDAddr2 = A2 Setting BootMode to 0 Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56 Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE About to call MrcInit(); BayleyBay Platform Type RID = 0x11. Reg_EFF_DualCH_EN = 0x40030040. CurrentMrcData.BootMode = 4 C1.D0: SPD not present. Configuring Memory Start... START_RMT: RxDqLeft RxDqRight RxVLow RxVHigh TxDqLeft TxDqRight CmdLeft CmdRight ------------------------------------------------------------------------------------------------ Channel 0 Rank 0 -22 21 -21 19 -25 26 0 0 STOP_RMT: CMD module is per channel only and without Rank differentiation Configuring Memory End UpperTotalMemory = 0x80000000 dBMBOUND = 0x80000000 dBMBOUNDHI = 0x80000000 dGFXBase = 0x7BE00000 dTSegBase = 0x7B000000 Save MRC params. Current MRC Data DDR Freq 1 Current MRC Data Core Freq 1 Current MRC Data Tcl 7 Current MRC Data WL 6 Current MRC Data DDRType 1 Current MRC Data MMIO Size 800 Current MRC Data TSeg Size 8 Channel 0 Enabled 1 Socket 0 DimmPresent 1 DimmDataWidth 1 DimmBusWidth 3 DimmSize 2 DimmSides 0 Channel 1 Enabled 0 Socket 0 DimmPresent 0 DimmDataWidth 0 DimmBusWidth 0 DimmSize 0 DimmSides 0 Current MRC Timing Data MRC_DATA_TRP 7 Current MRC Timing Data MRC_DATA_TRCD 7 Current MRC Timing Data MRC_DATA_TRAS 13 Current MRC Timing Data MRC_DATA_TWR 8 Current MRC Timing Data MRC_DATA_TWTR 4 Current MRC Timing Data MRC_DATA_TRRD 4 Current MRC Timing Data MRC_DATA_TRTP 4 Current MRC Timing Data MRC_DATA_TFAW 1B PeiInstallPeiMemory MemoryBegin 0x7AE00000, MemoryLength 0x200000 Old Stack size 24576, New stack size 131072 Heap Offset = 0x0 Stack Offset = 0x840F0000 Stack Hob: BaseAddress=0x7AE00000 Length=0x20000 Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: FFFC1281 Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731 Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7 Install PPI: EF398D58-9DFD-4103-BF94-78C6F4FE712F InstallVlvInitPpi() - Start Register PPI Notify: 7D84B2C2-22A1-4372-B12C-EBB232D3A6A3 InstallVlvInitPpi() - End InstallPchInitPpi() - Start PmcBase needs to be programmed and enabled before here. ProgramGpioSCForSDCardWA Done.... Register PPI Notify: 15344673-D365-4BE2-8513-1497CC07611D Register PPI Notify: 00B710BA-8CD6-4BF3-AB7A-9A24F54CC334 Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: 7AFCB3C4 PchModPhyProgramming() - Start SOC B0 and later ModPhy Table programming PchModPhyProgramming() - End PchSataInit() - Start PchSataInit() - End InstallPchInitPpi() - End Register PPI Notify: 5BAB88BA-E0E2-4674-B6AD-B812F6881CD6 Register PPI Notify: 4B0165A9-61D6-4E23-A0B5-3EC79C2E30D5 Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793 Register PPI Notify: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B Install PPI: DD29124D-7819-4F15-BB07-351E7451D71C Install PPI: 7D84B2C2-22A1-4372-B12C-EBB232D3A6A3 Notify: PPI Guid: 7D84B2C2-22A1-4372-B12C-EBB232D3A6A3, Peim notify entry point: 7AFDE2E9 VlvInitPeiEntryPoint start.... ------------------------ VLV SSA Platform Policy dump Begin --------------- Graphics Configuration: GttSize : 2 MB IgdDvmt50PreAlloc : 2 PrimaryDisplay : 0 ApertureSize : 2 Turbo Enable : 1 ------------------------ VLV SSA Platform Policy dump END ----------------- ProgramEcBase Done.... SSASafeConfiguration Done.... Clear Dbuff to all zero before read 0xFFFFFFFF PUNIT_ISPSSPM0 value is 0x3000003 ISP Device is enabled by fuse Skip ISPConfig InitThermalRegisters Done.... IGD enabled. IGD Turbo Enable. PUNIT_BIOS_CONFIG11 = 0x400301C0. PUNIT_BIOS_CONFIG22 = 0x40030140. TotalMmioLength: 0x10400000 bytes GraphicsInit Done.... Install PPI: 09EA8911-BE0D-4230-A003-EDC693B48E11 Install mVlvPeiInitPpi Done.... Install PPI: 15344673-D365-4BE2-8513-1497CC07611D Notify: PPI Guid: 15344673-D365-4BE2-8513-1497CC07611D, Peim notify entry point: 7AFCBB94 PchInitialize() - Start PchMiscInit() - Start <<<<<<<<<<<<<<<<<< Debug log Start end >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> L&T Technology Services Ltd www.LntTechservices.com<http://www.lnttechservices.com/> This Email may contain confidential or privileged information for the intended recipient (s). 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coreboot-coreboot-unknown Thu May 12 08:04:42 UTC 2016 romstage starting... RTC Init POST: 0x44 POST: 0x47 POST: 0x48 Starting the Intel FSP (early_init) PM1_STS = 0x0 PM1_CNT = 0x0 GEN_PMCON1 = 0x44000 prev_sleep_state = S5 Configure Default UPD Data PcdMrcInitSPDAddr1: 0xa0 (default) PcdMrcInitSPDAddr2: 0xa2 (default) PcdSataMode: 0x01 (set) PcdLpssSioEnablePciMode: 0x01 (default) PcdMrcInitMmioSize: 0x800 (default) PcdIgdDvmt50PreAlloc: 0x02 (default) PcdApertureSize: 0x02 (default) PcdGttSize: 0x02 (default) SerialDebugPortAddress: 0x3f8 (default) SerialDebugPortType: 0x01 (default) PcdMrcDebugMsg: 0x01 (default) PcdSccEnablePciMode: 0x01 (default) IgdRenderStandby: 0x00 (default) TxeUmaEnable: 0x00 (default) PcdOsSelection: 0x04 (default) PcdEMMC45DDR50Enabled: 0x01 (default) PcdEMMC45HS200Enabled: 0x00 (default) PcdEMMC45RetuneTimerValue: 0x08 (default) PcdEnableIgd: 0x01 (default) AutoSelfRefreshEnable: 0x00 (default) APTaskTimeoutCnt: 0x00 (default) GTT Size: 2 MB Tseg Size: 8 MB Aperture Size: 256 MB IGD Memory Size: 64 MB MMIO Size: 2048 MB MIPI/ISP: Disabled Sdio: Enabled Sdcard: Enabled SATA: Enabled SIO Dma 0: Enabled SIO I2C0: Enabled SIO I2C1: Enabled SIO I2C2: Enabled SIO I2C3: Enabled SIO I2C4: Enabled SIO I2C5: Enabled SIO I2C6: Enabled Azalia: Enabled SIO Dma1: Enabled Pwm0: Enabled Pwm1: Enabled Hsuart0: Enabled Hsuart1: Enabled Spi: Enabled Lpe: Disabled eMMC Mode: eMMC 4.5 SATA Mode: AHCI Xhci: Enabled POST: 0x92 ============= PEIM FSP (VLYVIEW0 0x00000304) ============= Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A The 0th FV start address is 0x000FFFE0400, size is 0x00017C00, handle is 0x0 Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38 Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Install PPI: DBE23AA9-A345-4B97-85B6-B226F1617389 Install PPI: 06E81C58-4AD7-44BC-8390-F10265F72480 Install PPI: 01F34D25-4DE2-23AD-3FF3-36353FF323F1 Install PPI: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Notify: PPI Guid: 49EDB1C1-BF21-4761-BB12-EB0031AABB39, Peim notify entry point: FFFE0FD4 The 1th FV start address is 0x000FFFB0000, size is 0x0002F400, handle is 0xFFFB0000 Install PPI: A55D6970-1306-440C-8C72-8F51FAFB2926 PcdMrcInitTsegSize = 8 PcdMrcInitMmioSize = 800 PcdMrcInitSPDAddr1 = A0 PcdMrcInitSPDAddr2 = A2 Setting BootMode to 0 Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56 Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE About to call MrcInit(); BayleyBay Platform Type RID = 0x11. Reg_EFF_DualCH_EN = 0x40030040. CurrentMrcData.BootMode = 4 C1.D0: SPD not present. Configuring Memory Start... START_RMT: RxDqLeft RxDqRight RxVLow RxVHigh TxDqLeft TxDqRight CmdLeft CmdRight ------------------------------------------------------------------------------------------------ Channel 0 Rank 0 -22 21 -21 19 -25 26 0 0 STOP_RMT: CMD module is per channel only and without Rank differentiation Configuring Memory End UpperTotalMemory = 0x80000000 dBMBOUND = 0x80000000 dBMBOUNDHI = 0x80000000 dGFXBase = 0x7BE00000 dTSegBase = 0x7B000000 Save MRC params. Current MRC Data DDR Freq 1 Current MRC Data Core Freq 1 Current MRC Data Tcl 7 Current MRC Data WL 6 Current MRC Data DDRType 1 Current MRC Data MMIO Size 800 Current MRC Data TSeg Size 8 Channel 0 Enabled 1 Socket 0 DimmPresent 1 DimmDataWidth 1 DimmBusWidth 3 DimmSize 2 DimmSides 0 Channel 1 Enabled 0 Socket 0 DimmPresent 0 DimmDataWidth 0 DimmBusWidth 0 DimmSize 0 DimmSides 0 Current MRC Timing Data MRC_DATA_TRP 7 Current MRC Timing Data MRC_DATA_TRCD 7 Current MRC Timing Data MRC_DATA_TRAS 13 Current MRC Timing Data MRC_DATA_TWR 8 Current MRC Timing Data MRC_DATA_TWTR 4 Current MRC Timing Data MRC_DATA_TRRD 4 Current MRC Timing Data MRC_DATA_TRTP 4 Current MRC Timing Data MRC_DATA_TFAW 1B PeiInstallPeiMemory MemoryBegin 0x7AE00000, MemoryLength 0x200000 Old Stack size 24576, New stack size 131072 Heap Offset = 0x0 Stack Offset = 0x840F0000 Stack Hob: BaseAddress=0x7AE00000 Length=0x20000 Reinstall PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Reinstall PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A Reinstall PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Install PPI: F894643D-C449-42D1-8EA8-85BDD8C65BDE Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: FFFC1281 Install PPI: 0AE8CE5D-E448-4437-A8D7-EBF5F194F731 Install PPI: 1A36E4E7-FAB6-476A-8E75-695A0576FDD7 Install PPI: EF398D58-9DFD-4103-BF94-78C6F4FE712F InstallVlvInitPpi() - Start Register PPI Notify: 7D84B2C2-22A1-4372-B12C-EBB232D3A6A3 InstallVlvInitPpi() - End InstallPchInitPpi() - Start PmcBase needs to be programmed and enabled before here. ProgramGpioSCForSDCardWA Done.... Register PPI Notify: 15344673-D365-4BE2-8513-1497CC07611D Register PPI Notify: 00B710BA-8CD6-4BF3-AB7A-9A24F54CC334 Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE Notify: PPI Guid: F894643D-C449-42D1-8EA8-85BDD8C65BDE, Peim notify entry point: 7AFCB3C4 PchModPhyProgramming() - Start SOC B0 and later ModPhy Table programming PchModPhyProgramming() - End PchSataInit() - Start PchSataInit() - End InstallPchInitPpi() - End Register PPI Notify: 5BAB88BA-E0E2-4674-B6AD-B812F6881CD6 Register PPI Notify: 4B0165A9-61D6-4E23-A0B5-3EC79C2E30D5 Register PPI Notify: 30CFE3E7-3DE1-4586-BE20-DEABA1B3B793 Register PPI Notify: 7CE88FB3-4BD7-4679-87A8-A8D8DEE50D2B Install PPI: DD29124D-7819-4F15-BB07-351E7451D71C Install PPI: 7D84B2C2-22A1-4372-B12C-EBB232D3A6A3 Notify: PPI Guid: 7D84B2C2-22A1-4372-B12C-EBB232D3A6A3, Peim notify entry point: 7AFDE2E9 VlvInitPeiEntryPoint start.... ------------------------ VLV SSA Platform Policy dump Begin --------------- Graphics Configuration: GttSize : 2 MB IgdDvmt50PreAlloc : 2 PrimaryDisplay : 0 ApertureSize : 2 Turbo Enable : 1 ------------------------ VLV SSA Platform Policy dump END ----------------- ProgramEcBase Done.... SSASafeConfiguration Done.... Clear Dbuff to all zero before read 0xFFFFFFFF PUNIT_ISPSSPM0 value is 0x3000003 ISP Device is enabled by fuse Skip ISPConfig InitThermalRegisters Done.... IGD enabled. IGD Turbo Enable. PUNIT_BIOS_CONFIG11 = 0x400301C0. PUNIT_BIOS_CONFIG22 = 0x40030140. TotalMmioLength: 0x10400000 bytes GraphicsInit Done.... Install PPI: 09EA8911-BE0D-4230-A003-EDC693B48E11 Install mVlvPeiInitPpi Done.... Install PPI: 15344673-D365-4BE2-8513-1497CC07611D Notify: PPI Guid: 15344673-D365-4BE2-8513-1497CC07611D, Peim notify entry point: 7AFCBB94 PchInitialize() - Start PchMiscInit() - Start
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