[coreboot] How to read the gpio status?

[김유석]

Dear Sir.

I want to control the GPIO pin that pin number is 12, 13, 14


DataSheet(P 1909) and coreboot source 
code(src/southbridge/intel/fsp_rangeley/gpio.c, gpio.h) is said to me 
that "It is very easy"


If i want to set the HIGH to 12, 13, 14

Just setup the some register, is see below.

  SC_USE_SEL = 0x7000(b0111 0000 0000 0000)

    Is mean, the 12, 13, 14 is config to GPIO mode.(enable GPIO)

  SC_IO_SEL = 0x00(b0000 0000 0000 0000)

    Is mean, the 12, 13, 14 is output mode

  SC_GP_LVL = 0x7000(b0111 0000 0000 0000)

    Is mean, the 12, 13, 14 is set to HIGH level(1)


src/southbridge/intel/fsp_rangeley/gpio.h

  /* Core GPIO */
  const struct soc_gpio soc_gpio_mode = {
    .gpio12 = GPIO_MODE_GPIO, /* Board ID GPIO */
    .gpio13 = GPIO_MODE_GPIO, /* Board ID GPIO */
    .gpio14 = GPIO_MODE_GPIO, /* Board ID GPIO */
  };

  const struct soc_gpio soc_gpio_direction = {
    .gpio12 = GPIO_DIR_OUTPUT,
    .gpio13 = GPIO_DIR_OUTPUT,
    .gpio14 = GPIO_DIR_OUTPUT,
  };

  const struct soc_gpio soc_gpio_level = {
    .gpio12 = GPIO_LEVEL_HIGH,
    .gpio13 = GPIO_LEVEL_HIGH,
    .gpio14 = GPIO_LEVEL_HIGH,
  };


Yes, It is perfectley running.

The 12, 13, 14 PIN is goto active-HIGH.(I was check this pin use by 
oscilloscope.)


And I'm try to read the SC_GP_LVL register for check current 
status/config of gpio pins

I was *respected* the read value is *0x7000*, because i was writed the 
*0x7000* to SC_GP_LVL.


But, every time readed the *0x00* from SC_GP_LVL register.


_When write 0x7000 write to SC_USE_SEL, Can read the 0x7000 from 
SC_USE_SEL._

_When write 0x00 write to SC_IO_SEL, Can read the 0x00 from SC_IO_SEL._


But,


*_When write 0x7000 write to SC_GP_LVL, Can read the 0x00 from 
SC_GP_LVL. everytime._*


I don't understand this sistuation.


Please advise to me.


Thank you.





-- 
coreboot mailing list: coreboot@coreboot.org
https://www.coreboot.org/mailman/listinfo/coreboot