2016-10-31 0:18 GMT+01:00 Riko Ho <[email protected]>: > Hi Idwer, > 80 81 82 83 84 > 80: 10 00 07 34 01 08 3c 00 91 02 1c 00 00 00 00 00 0x84 starts here: ^^
> > isn't it : > > pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x00073401); > ? The byte ordering has to do with endianness, see this webpage: https://docs.oracle.com/cd/E26505_01/html/E27000/hwovr-66.html > > (correct me if I'm wrong) > change this to pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x003c0801); > > > > -- > /*=== > Kind regards, > Riko Ho > ===*/ -- coreboot mailing list: [email protected] https://www.coreboot.org/mailman/listinfo/coreboot
