Not at all. ME can control clock output frequency at GPIO 64/65/66/67.
From coreboot you can only set these pins to NATIVE mode. So, if you
EC/SIO take clock input from PCH, without ME they may work incorrectly.
But looks like at t530 this outputs sets in GPIO mode. David, can you
dump gpios from system with running ME (can be done by 'inteltool -g').
20.07.2017 20:58, Nico Huber пишет:
Hi David,
On 20.07.2017 18:44, David Hobach wrote:
Dear all,
just tested two coreboot + SeaBios images on a T530 that were identical
except one time with ME and one time without (using the compile option,
rev 54db255529ce8afc689ae425c24b7fb1d45654e8).
Unfortunately it seems that ME does some CPU fan initialization (ACPI?)
that coreboot doesn't, i.e. on the image without ME the CPU fan didn't
start anymore = not usable. I tested with Fedora 26 and ubuntu 14.02 LTS
up to temperatures of 98 degrees celsius, but it wouldn't start. I
didn't test manual fan control.
the fan should be controlled by the EC which runs independently of the
ME and the host CPU. There are some settings the host CPU can write into
the EC RAM (coreboot should do that, the ME doesn't know anything about
it). It might be that coreboot does something wrong (e.g. trying to ap-
ply these settings while the EC is not ready yet after the reset) and
that it only becomes obvious after the EC has been reset (and even then
it would depend on the EC firmware, so YMMV). Another explanation could
be that something broke during the flashing (not due to bad data in the
flash but due to an overall bad state of the hardware). In which way did
you flash? did you use the internal flasher? an external one? if exter-
nal, did you connect an external power supply to the flash chip? All
bets are off, if you did the the latter.
Though unlikely, the following could also be the case: with the cleaned
ME the system is in a weird state where it can't correctly write the EC
RAM registers. But I really doubt that if the host behaves well other-
wise.
In any case, I'd check the coreboot log for errors.
Nico
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
