Hi Cameron, I am unfortunately not able to help you, since I myself am still new to coreboot (and to BIOS development in general).
However, I have also tried to produce a bootable image with the outdated Intel provided release of coreboot and U-Boot for Leafhill. The image does run, but U-Boot cannot start the USB controller, so I cannot load an OS (Yocto, in this case) via USB. When I run the U-Boot "usb start" command, it says "No controllers found". When you ran the Intel-provided version (stitched with the Windows tool), did you experience any similar problems with the USB controller in U-Boot? If so, did you manage to solve it? I am not sure where to start debugging this problem! I tried to build U-Boot myself and changed the U-Boot configuration to include USB controllers (which is disabled in the config provided by the Intel patch), but this produced a lot of "redeclaration of symbols" warnings and made no difference to what I see in run-time. (Modified config attached). Like Peter said earlier... "Firmware development is lots of fun! :)" Best regards, Tahnia On Wed, Sep 27, 2017 at 2:01 PM, Cameron Craig <[email protected]> wrote: > Hi All, > > > > I’m currently trying to get coreboot working on an Intel Leaf Hill > development board, we are using U-Boot as a payload. > > > > I have managed to create a bootable image using an out of date copy of > coreboot and U-Boot, provided by Intel under NDA. > > The stitching process used to generate the image is a little ugly: a set > of Windows tools are provided (or pointed at) by Intel to stitch the > various blobs together to create an 8MB image. > > We would like to move away from this process. Using the cbfs tool it looks > like we are getting a legacy image composed entirely of a single CBFS. > > > > However, as far as I understand, the latest coreboot release (v4.6) should > be capable of producing a 16MB working image without the use of external > tools. > > This is of course dependent on the provision of the correct binary blobs > such as the FSP, flash descriptor and IFWI. > > I have attached the descriptor of the IFWI image being used. > > > > This is the process I have followed in order to generate a coreboot image: > > 1. Clone coreboot (v4.6) > > 2. Obtain Apollo Lake FSP from Intel (https://github.com/IntelFSP/ > FSP) > > 3. Split FSP into its constituent parts (https://raw. > githubusercontent.com/tianocore/edk2/master/IntelFsp2Pkg/Tools/ > SplitFspBin.py) > > 4. Extract Flash Descriptor from an existing Leaf Hill UEFI image > (./ifdtool --extract leaf_hill_ref_board_uefi.bin) > > 5. Obtain IFWI image from Intel (Apollo Lake Technical Library) > > 6. make menuconfig (config file is attached) > > a. Mainboard > > i. > Mainboard > vendor (Intel) > > ii. > Mainboard > model (Leafhill) > > iii. [*] > Use IFWI Stitching > > iv. (IFWI) > section in .fmd file to place IFWI blob > > v. > (IFWI_SPI.bin) > Path to image coming from FIT Tool > > vi. > (descriptor.bin) > path to descriptor.bin > > vii. (Fsp_M.fd) > path to FSP-M.Fv blob > > viii. (Fsp_S.fd) > path to FSP-S.Fv > > b. Payload > > i. Add > a payload (U-Boot (Experimental)) > > ii. U-Boot > version (v2016.1) > > iii. > (coreboot-x86_defconfig) > U-Boot config file > > c. The rest are at Leaf Hill defaults. > > 7. make > > 8. Flash image to Leaf Hill SPI flash > > > > As far as I can tell, this process should produce a working image. > > However it does not. My most recent attempt has managed to blink the > PWR_OK LED, suggesting the PMIC/PMC is working, but no serial messages. > > Other than that, I currently have no working theories as to what the root > cause is L > > > > Is there anything obviously wrong with this process? > > Are there any bugs that I should be aware of relating to coreboot on an > Apollo Lake platform? > > I haven’t found a lot of documentation online to describe the exact > configuration and blob usage, are there any relevant sources of > documentation you could point me towards? > > > > Any help to answer the above, or any other advice would be greatly > appreciated. > > > > Cheers, > > Cameron > > > > Cameron Craig | Graduate Software Engineer | Exterity Limited > tel: +44 1383 828 250 <+44%201383%20828250> | fax: > e: [email protected] | w: www.exterity.com > > <http://www.exterity.com> > [image: ISO9001] <http://www.exterity.com/iso9001> [image: LinkedIn] > <http://www.linkedin.com/company/exterity> [image: Twitter] > <http://www.twitter.com/exterity> [image: YouTube] > <http://www.youtube.com/user/exterityiptv> > Exterity is a leading provider of IP Video and Digital Signage solutions > that helps organizations to harness the power of video to communicate, > educate and entertain. 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coreboot-leafhill_defconfig
Description: Binary data
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