Thank you for the clarification. I'll try to figure this out later this week.
Any help would be appreciated. I suppose I should file an issue. Will do. Le ven. 3 nov. 2017 04:19, Patrick Georgi <[email protected]> a écrit : > That's the bitfield item's size field, not its default value. > > > > Am Fr., 3. Nov. 2017 um 04:56 Uhr schrieb Thierry Laurion < > [email protected]>: > >> As I understand the code, KGPE-d16 doesn't use AGESA part (nor any?). >> >> Any reason why this value would be defaulting to enabled for whole sb700 >> dependents? >> >> --- a/src/vendorcode/amd/cimx/sb700/SBTYPE.h >> +++ b/src/vendorcode/amd/cimx/sb700/SBTYPE.h >> @@ -133,7 +133,7 @@ typedef struct _AMDSBCFG >> UINT32 SataPortMultCap :1; //6, 0:OFF 1:ON >> UINT32 SataReserved :2; //8:7, Reserved >> UINT32 SataClkAutoOff :1; //9, >> AutoClockOff for IDE modes 0:Disabled, 1:Enabled >> - UINT32 SataIdeCombinedMode :1; //10, >> SataIDECombinedMode 0:Disabled, 1:Enabled >> + UINT32 SataIdeCombinedMode :0; //10, >> SataIDECombinedMode 0:Disabled, 1:Enabled >> UINT32 SataIdeCombMdPriSecOpt:1; //11, Combined >> Mode, SATA as primary or secondary 0:primary 1:secondary >> UINT32 SataReserved1 :6; //17:12, Not >> used currently >> UINT32 SataEspPort :6; //23:18 SATA >> port is external accessiable on a signal only connector (eSATA:) >> >> >> Le jeu. 2 nov. 2017 à 09:33, Peter Stuge <[email protected]> a écrit : >> >>> Thierry Laurion wrote: >>> > ENABLE_IDE_COMBINED_MODE available for sp800 but not for sp700, for >>> ewhich >>> > sp5100 is derived from: >>> .. >>> > Suggested Workaround >>> > Disable combined mode by setting a platform BIOS callback option to >>> CIMx >>> > called "SataIdeCombinedMode" to 0. >>> .. >>> > Is there something i'm missing? Is it possible to disable combined >>> > sata mode for sb700 from coreboot? >>> >>> SB700 mainboard support seems copypasted rather than engineered. The >>> sustainable solution is to move sb700_cfg.c from src/mainboard/*/ >>> to src/southbridge/amd/cimx/sb700/ and hook the configuration in that >>> file into Kconfig. >>> >>> Until someone does that, you could indeed change the assignment of >>> that option by looking for >>> >>> SataIdeCombinedMode >>> >>> in the source code, if a sb700_cimx_config() function is called for >>> this board - but that might not be the case if the board port chose >>> not to use that part of AGESA. >>> >>> >>> //Peter >>> >>> -- >>> coreboot mailing list: [email protected] >>> https://mail.coreboot.org/mailman/listinfo/coreboot >>> >> -- >> coreboot mailing list: [email protected] >> https://mail.coreboot.org/mailman/listinfo/coreboot > > -- > Google Germany GmbH, ABC-Str. 19, 20354 Hamburg > <https://maps.google.com/?q=ABC-Str.+19,+20354+Hamburg&entry=gmail&source=g> > Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: > Hamburg > Geschäftsführer: Paul Manicle, Halimah DeLaine Prado >
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