On 22/05/2018 07:03, taii...@gmx.com wrote: > AMD has at long last coughed up the stuff to the linux-firmware people > > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/diff/amd-ucode/microcode_amd_fam15h.bin?id=77101513943ef198e2050667c87abf19e6cbb1d8 > > The fam15h microcode update adds IBPB > > * Indirect Branch Prediction Barrier (IBPB) > * PRED_CMD MSR is available: YES > * CPU indicates IBPB capability: YES (IBPB_SUPPORT feature bit) > > The question is what about the other stuff? IBRS, STIBP? This is > confusing due to zero documentation on these updates from amd...Why > don't they have those in this update? Would it be possible to easily add > the support flags without microcode for those who use libreboot? >
What you mean with "add the support flags without microcode"? A CPU either supports some instructions (like IBPB) because it actually does (i.e. the microcode tells it how to do that), or it does not. I don't know if you can fake enable these support flags, but I don't think it is a good idea at all, at best it would just be a lie, at worst it could cause issues (crashing?) if the kernel calls an instruction that isn't available (I don't know how that is handled). -Alberto -- coreboot mailing list: coreboot@coreboot.org https://mail.coreboot.org/mailman/listinfo/coreboot