XIP was already selected, the FSP headers updated and the right platform 
chosen... so, i didn't know what to do, that was the reason I decided to test 
on previous version.

‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
On Wednesday, October 31, 2018 9:13 AM, Lance Zhao <lance.z...@gmail.com> wrote:

> The "Invalid FSPM signature" at this stage, if FspUpd.h for coffeelake 
> already there. maybe "XIP mode" had not been selected in config file?
>
> On Tue, Oct 30, 2018 at 10:42 PM Jose Trujillo <ce.au...@protonmail.com> 
> wrote:
>
>> Thank you Lance;
>>
>> I got back to 4.8.1 because on master of 2 weeks ago I was getting post code 
>> 0x34 "Invalid FSPM signature"; but I will try again.
>> Coreboot engineers have been doing much work on integrating FSP to coreboot 
>> and may be the reason has been unstable.
>>
>> Jose.
>>
>> ‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
>> On Wednesday, October 31, 2018 4:08 AM, Lance Zhao <lance.z...@gmail.com> 
>> wrote:
>>
>>> Feels like CoffeeLake RVP11 still been actively uploaded with newer 
>>> changes. But at least your coreboot code seems to be outdated, all of those 
>>> coffeelake-h related ID(CPUID and MCH/PCHID) had been up-streamed recently. 
>>> I will suggest you to sync up your code base and try again.
>>>
>>> Lance
>>>
>>> On Tue, Oct 30, 2018 at 7:10 AM Jose Trujillo via coreboot 
>>> <coreboot@coreboot.org> wrote:
>>>
>>>> Hello coreboot engineers:
>>>>
>>>> I am using the "coffeelake RVP11" to test the code on my "non RVP" system.
>>>> The payload doesn't load.
>>>>
>>>> I found several errors in the attached log:
>>>>
>>>> 1.- Device ID's of the system are still not existant in coreboot.
>>>> 2.- Misconfigured # of MAX CPU CORES.
>>>> 3.- Maybe memory is still not properly initialized because RVP platform 
>>>> uses LPDDR4 and use SPD.bin VS my system that use DDR4 SO-UDIMM on SMB SPD 
>>>> channel.
>>>>
>>>> Please help me to identify the root of the problem that causes RAM "Failed 
>>>> Segment"....
>>>> Thank you in advance.
>>>> Jose Trujillo.
>>>> --
>>>> coreboot mailing list: coreboot@coreboot.org
>>>> https://mail.coreboot.org/mailman/listinfo/coreboot
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