Hello Naresh: > Just to add thought in HW perspective, Is VBUS to USB ports are stable > during S3 transition. Do you see any OC# lines getting asserted ? I do not have an oscilloscope on hand until Monday BUT.... I just borrowed from my programmer's colleagues another model of COM express carrier board and works stable (as it should).
So, it's certain that is a hardware flaw and probably cause a glitch on +5V_SBY (just looking and comparing the schematics of both). Not a coreboot's fault... Sorry about that, let's move on and thank you very much for your support and showing me the right way. BTW: This interesting debug information you provided me I will keep on hand for future issues. Jose Trujillo. -- coreboot mailing list: [email protected] https://mail.coreboot.org/mailman/listinfo/coreboot
