Hello Edward, On 01.08.19 18:32, edward.l.william...@boeing.com wrote: > I have a need to insert some experimental code (never to be checked in) just > before the ECC RAM is initialized. The customer wants a specific test to be > done before the ram is zeroed out.
when you say "just before", do you need the RAM to be available already for that test? If so, you'll have to look into Intel FSP source code, not coreboot. Generally, the startup sequence depends a lot on the specific platform and version of FSP used. Nico _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
